rits-drsl / ZybotR2-96-fpt19
An UGV-system using SoC-FPGA developed for FPGA design competition held on ICFPT2019
☆17Updated 4 years ago
Alternatives and similar repositories for ZybotR2-96-fpt19:
Users that are interested in ZybotR2-96-fpt19 are comparing it to the libraries listed below
- 10G Ethernet MAC implementation☆21Updated 4 years ago
- Source Codes for a lecture entitled "Parallel and Reconfigurable VLSI Computing" in Tokyo Tech.☆26Updated 3 years ago
- Implementation VexRiscv on ultra96☆11Updated 2 years ago
- HOG + SVM on FPGA☆26Updated 4 years ago
- Basic Common Modules☆36Updated last month
- Original FPGA platform☆54Updated last week
- Repository of HW design and SW for Ultra96 board + MIPI board☆17Updated 5 years ago
- ☆13Updated 6 years ago
- Open design rule (1um)☆18Updated 2 years ago
- みんなのSystemVerilog☆19Updated 2 years ago
- Ubuntu 18.04 Desktop for Ultra96/Ultra96-V2☆19Updated 4 years ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- Polyphony is Python based High-Level Synthesis compiler.☆102Updated 2 months ago
- NoC (Network-on-Chip) generator that generates Verilog HDL model of NoC consisting of on-chip routers☆59Updated 5 years ago
- FPGA+SoC+Linux+Device Tree Overlay+FPGA Manager U-Boot&Linux Kernel&Debian11 Images (for Xilinx:Zynq Ultrascale+ MPSoC)☆129Updated last year
- This is my first trial project for designing RISC-V in Chisel☆17Updated 8 months ago
- RISC-V RV32IMAFC Core for MCU☆35Updated 4 months ago
- ☆52Updated 2 years ago
- The Simple 5-staged pipeline RISC-V written in chisel3 for intel FPGA.☆44Updated 3 years ago
- ☆83Updated 7 months ago
- Sample scripts for FPGA-based AI Edge Contest 2019☆11Updated 4 years ago
- Examples for creating AXI-interfaced peripherals in Chisel☆73Updated 9 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- Binary Neural Network Framework for FPGA(Differentiable LUT)☆148Updated 2 months ago
- Fast and Flexible FPGA development using Hierarchical Partial Reconfiguration (FPT 2022)☆12Updated 9 months ago
- This repository contains a "Hello World" introduction application to the Xilinx PYNQ framework.☆96Updated 2 years ago
- Introductory examples for using PYNQ with Alveo☆49Updated last year
- Karuta HLS Compiler: High level synthesis from prototype based object oriented script language to RTL (Verilog) aiming to be useful for F…☆101Updated 2 years ago
- FOS - FPGA Operating System☆64Updated 4 years ago
- An open source PDK using TIGFET 10nm devices.☆47Updated 2 years ago