microsoft / msr-cloakLinks
Code for experiments referenced in the Usenix Security 2017 paper "Strong and Efficient Cache Side-Channel Protection using Hardware Transactional Memory"
☆15Updated 3 years ago
Alternatives and similar repositories for msr-cloak
Users that are interested in msr-cloak are comparing it to the libraries listed below
Sorting:
- Panopticon is a complete in-DRAM RowHammer mitigation. This code simulates an implementation of Panopticon in DDR5.☆14Updated 2 years ago
- ☆47Updated 7 years ago
- LLVM with SGX support☆13Updated 7 years ago
- ☆38Updated 7 years ago
- Commodity Obfuscation Engine for Intel SGX☆20Updated 6 years ago
- This repository contains some tools to monitor the UNC_CBO_CACHE_LOOKUP event of the C-Boxes.☆12Updated 8 years ago
- SGXBounds: Memory Safety for Shielded Execution (compiler pass and runtime)☆34Updated 8 years ago
- This repo contains Microsoft compiler-tests to validate Windows platform particulars.☆27Updated 2 years ago
- ☆11Updated 5 years ago
- Hypervisor implementation for x86_64 ISA MIT JOS☆34Updated 11 years ago
- Microarchitectural attack development frameworks for prototyping attacks in native code (C, C++, ASM) and in the browser☆62Updated 3 years ago
- Extensible Memory Benchmarking Tool☆115Updated 8 years ago
- Telling your secrets without page faults: Stealthy page table-based attacks on enclaved execution☆34Updated 7 years ago
- Compiler-based tool that protects Intel SGX applications against controlled-channel attacks☆27Updated 8 years ago
- some tlb experimentation code: calculate L1, L2 miss penalties and show cross-HT interference.☆14Updated 6 years ago
- LLVM Implementation of different ShadowStack schemes for x86_64☆39Updated 5 years ago
- memTrace, a framework for lightweight memory tracing☆58Updated 5 years ago
- Security Test Benchmark for Computer Architectures☆21Updated 2 months ago
- PIN-based Fault-Injector is a fault injector based on the Intel PIN tool. For more information, please refer to the following paper:☆18Updated 7 years ago
- ☆16Updated 6 years ago
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆23Updated 3 years ago
- Securing System Logs With Intel SGX☆16Updated 8 years ago
- Performance Counter Measurements at the cycle granularity☆18Updated 4 years ago
- ☆52Updated 3 years ago
- Accompanying material for C-FLAT: Control Flow Attestation for Embedded Systems Software☆45Updated 9 years ago
- Minimal RISC Extensions for Isolated Execution☆54Updated 6 years ago
- RISC-V Tools (GNU Toolchain, ISA Simulator, Tests)☆23Updated 6 years ago
- ☆34Updated 2 years ago
- QEMU based emulation library for micro-architectural simulation (ARM64 and x86)☆43Updated 6 years ago
- A POSIX Filesystem for Enclaves with a Mechanized Safety Proof☆17Updated 6 years ago