Alternatives and similar repositories for pershing

Users that are interested in pershing are comparing it to the libraries listed below

• qmn / dewey
  C version of PERSHING, a place-and-route tool for Minecraft Redstone circuits
  ☆23Updated 7 years ago
• Kuree / kratos
  Debuggable hardware generator
  ☆69Updated 2 years ago
• marlls1989 / arv
  ARV: Asynchronous RISC-V Go High-level Functional Model
  ☆25Updated 4 years ago
• seunghyukcho / pipelined-cpu-verilog
  Verilog implementation of pipelined cpu
  ☆12Updated 4 years ago
• jbush001 / ChiselGPU
  Experiments with fixed function renderers and Chisel HDL
  ☆59Updated 6 years ago
• cliffordwolf / PonyLink
  A single-wire bi-directional chip-to-chip interface for FPGAs
  ☆121Updated 8 years ago
• lxp32 / lxp32-cpu
  A lightweight, open source and FPGA-friendly 32-bit CPU core based on an original instruction set
  ☆61Updated last week
• Wren6991 / tt02-whisk-serial-processor
  Whisk: 16-bit serial processor for TT02
  ☆13Updated 8 months ago
• SteffenReith / J1Sc
  A reimplementation of a tiny stack CPU
  ☆83Updated last year
• geky / gb
  The Original Nintendo Gameboy in Verilog
  ☆58Updated 10 years ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• rsnikhil / RISCV_ISA_Formal_Spec_in_BSV
  A formal spec of the RISC-V Instruction Set Architecture, written in Bluespec BSV (executable, synthesizable)
  ☆20Updated 7 years ago
• m-labs / lm32
  LatticeMico32 soft processor
  ☆106Updated 10 years ago
• rsnikhil / RISCV_Piccolo_v1
  Implementation of RISC-V RV32IM. Simple in-order 3-stage pipeline. Low resources (e.g., FPGA softcore).
  ☆33Updated 8 years ago
• micro-FPGA / engine-V
  SoftCPU/SoC engine-V
  ☆54Updated 2 months ago
• onchipuis / mriscvcore
  A 32-bit RISC-V processor for mriscv project
  ☆58Updated 7 years ago
• tomverbeure / mr1
  MR1 formally verified RISC-V CPU
  ☆53Updated 6 years ago
• Wren6991 / Hazard5
  5-stage RISC-V CPU, originally developed for RISCBoy
  ☆27Updated last year
• IBM / hdl-tools
  Facilitates building open source tools for working with hardware description languages (HDLs)
  ☆63Updated 5 years ago
• jbush001 / MiteCPU
  Minimal microprocessor
  ☆20Updated 7 years ago
• rubund / graywolf
  ☆113Updated 4 years ago
• AntonMause / rv16poc
  16 bit RISC-V proof of concept
  ☆24Updated 8 months ago
• Ravenslofty / 74xx-liberty
  ☆67Updated 2 years ago
• cliffordwolf / xbitmanip
  RISC-V XBitmanip Extension
  ☆26Updated 6 years ago
• jiegec / fpu-wrappers
  Wrappers for open source FPU hardware implementations.
  ☆31Updated last year
• dkilfoyle / logic2
  Digital Logic Simulator
  ☆31Updated 4 years ago
• tvanas / r-vex
  A reconfigurable and extensible VLIW processor implemented in VHDL
  ☆32Updated 10 years ago
• alfikpl / aoR3000
  The aoR3000 is a MIPS R3000A compatible core capable of booting the Linux kernel version 3.16 in about 3 seconds and with a rating of 48.…
  ☆42Updated 10 years ago
• forflo / yodl
  A VHDL frontend for Yosys
  ☆102Updated 8 years ago
• rdiez / uart_dpi
  DPI module for UART-based console interaction with Verilator simulations
  ☆23Updated 12 years ago