Alternatives and similar repositories for JPEG-1992-lossless-encoder-core

Users that are interested in JPEG-1992-lossless-encoder-core are comparing it to the libraries listed below

• YosysHQ / prjpeppercorn
  Project Peppercorn - GateMate FPGA Bitstream Documentation
  ☆18Updated this week
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆57Updated 3 weeks ago
• mithro / pmod-hdmi
  HDMI Expansion Modules compatible with the Pmod standard
  ☆11Updated 7 years ago
• emeb / up5k_riscv
  There are many RISC V projects on iCE40. This one is mine.
  ☆15Updated 4 years ago
• FeldmeierMichael / MIPI_CSI_2
  ☆14Updated last year
• felixheld / AXIOM-photonSDI-hw
  SDI interface board for the apertus° AXIOM beta camera
  ☆13Updated 6 years ago
• daveshah1 / nextpnr
  nextpnr portable FPGA place and route tool
  ☆12Updated 4 years ago
• xobs / valentyusb
  USB Full-Speed core written in migen/LiteX
  ☆12Updated 5 years ago
• tomverbeure / ecp5_jtag
  Use ECP5 JTAG port to interact with user design
  ☆26Updated 3 years ago
• chili-chips-ba / openPCIE
  Peripheral Component Interconnect has taken Express lane long ago, going for xGbps SerDes. Now (for the first time) in opensource on the …
  ☆11Updated 2 weeks ago
• ArcaneNibble / KinglerPAR
  Next-Generation FPGA Place-and-Route
  ☆10Updated 6 years ago
• m-labs / microscope
  Finding the bacteria in rotting FPGA designs.
  ☆14Updated 4 years ago
• apertus-open-source-cinema / axiom-micro-gateware
  gateware for the main fpga, including a hispi decoder and image processing
  ☆13Updated 6 years ago
• jeanthom / gram
  DDR3 controller for nMigen (WIP)
  ☆14Updated last year
• daveshah1 / ElasticC
  lightweight open HLS for FPGA rapid prototyping
  ☆20Updated 7 years ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆31Updated 4 years ago
• rbkettlewell / trollstigen-fpga
  Open source fpga project leveraging vtr CAD flow.
  ☆26Updated 2 years ago
• Wren6991 / libfpga
  Reusable Verilog 2005 components for FPGA designs
  ☆43Updated 2 months ago
• daveshah1 / flow-examples
  Misc open FPGA flow examples
  ☆8Updated 5 years ago
• wyvernSemi / usbModel
  USB virtual model in C++ for Verilog
  ☆30Updated 7 months ago
• enjoy-digital / litesata_axiom
  ☆12Updated 4 years ago
• tuliopereirab / arithmetic-encoder-av1
  This project is being developed as part of a Master's degree research sponsored by Brazil's CNPQ. It's goal is to design a hardware archi…
  ☆26Updated 2 years ago
• nmi-leipzig / sim-x-pll
  Verilog based simulation modell for 7 Series PLL
  ☆13Updated 5 years ago
• whitequark / icefloorplan
  iCE40 floorplan viewer
  ☆24Updated 6 years ago
• lawrie / tiny_ram_soc
  Picorv32 SoC that uses only BRAM, not flash memory
  ☆12Updated 6 years ago
• litex-hub / litespi
  Small footprint and configurable SPI core
  ☆41Updated 3 weeks ago
• kazkojima / lunauac2-pdm
  A LiteX module implementing a USB UAC2 module with simple PDM in/out
  ☆14Updated 3 years ago
• HarmonInstruments / verilog
  ☆20Updated 2 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 5 years ago
• xobs / coriolis
  An alternative PnR system, or at least an attempt to get it running on Ubuntu 18.04.
  ☆11Updated 6 years ago