scale-snu / LLMSimulatorLinks
☆24Updated 2 months ago
Alternatives and similar repositories for LLMSimulator
Users that are interested in LLMSimulator are comparing it to the libraries listed below
Sorting:
- ☆118Updated last year
- NeuPIMs: NPU-PIM Heterogeneous Acceleration for Batched LLM Inferencing☆108Updated last year
- ☆163Updated 11 months ago
- UPMEM LLM Framework allows profiling PyTorch layers and functions and simulate those layers/functions with a given hardware profile.☆37Updated 5 months ago
- ☆10Updated 10 months ago
- The simulator for SPADA, an SpGEMM accelerator with adaptive dataflow☆46Updated 2 years ago
- Open-source Framework for HPCA2024 paper: Gemini: Mapping and Architecture Co-exploration for Large-scale DNN Chiplet Accelerators☆107Updated 8 months ago
- H2-LLM: Hardware-Dataflow Co-Exploration for Heterogeneous Hybrid-Bonding-based Low-Batch LLM Inference☆81Updated 8 months ago
- Artifact for paper "PIM is All You Need: A CXL-Enabled GPU-Free System for LLM Inference", ASPLOS 2025☆119Updated 8 months ago
- A simulator for SK hynix AiM PIM architecture based on Ramulator 2.0☆52Updated 5 months ago
- PIMeval simulator and PIMbench suite☆42Updated last month
- [ASPLOS 2024] CIM-MLC: A Multi-level Compilation Stack for Computing-In-Memory Accelerators☆45Updated last year
- MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator☆55Updated 4 years ago
- Processing-In-Memory (PIM) Simulator☆215Updated last year
- An analytical framework that models hardware dataflow of tensor applications on spatial architectures using the relation-centric notation…☆87Updated last year
- mNPUsim: A Cycle-accurate Multi-core NPU Simulator (IISWC 2023)☆67Updated last week
- ☆29Updated 4 years ago
- ☆54Updated last month
- ☆26Updated 10 months ago
- The framework for the paper "Inter-layer Scheduling Space Definition and Exploration for Tiled Accelerators" in ISCA 2023.☆82Updated 9 months ago
- [ASPLOS 2019] PUMA-simulator provides a detailed simulation model of a dataflow architecture built with NVM (non-volatile memory), and ru…☆68Updated 2 years ago
- Artifact material for [HPCA 2025] #2108 "UniNDP: A Unified Compilation and Simulation Tool for Near DRAM Processing Architectures"☆51Updated 4 months ago
- MICRO22 artifact evaluation for Sparseloop☆46Updated 3 years ago
- PALM: A Efficient Performance Simulator for Tiled Accelerators with Large-scale Model Training☆20Updated last year
- Document for PIM-SW☆21Updated last year
- ☆217Updated 2 months ago
- ☆55Updated 7 months ago
- Simulator framework for analysis of performance, energy consumption, area and cost of multi-node multi-chiplet tile-based manycore design…☆73Updated last year
- PUMA Compiler☆30Updated 2 months ago
- A Cycle-level simulator for M2NDP☆32Updated 4 months ago