xk264：AVC/H.264 Video Encoder IP Core (RTL)
☆57Mar 22, 2023Updated 3 years ago
Alternatives and similar repositories for xk264
Users that are interested in xk264 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- xk265：HEVC/H.265 Video Encoder IP Core (RTL)☆273Apr 9, 2023Updated 3 years ago
- xkDLA：XinKai Deep Learning Accelerator (RTL)☆41Jan 15, 2024Updated 2 years ago
- xkISP：Xinkai ISP IP Core (HLS)☆313Mar 14, 2023Updated 3 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆19Dec 8, 2017Updated 8 years ago
- ☆12Jul 20, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆124Mar 28, 2026Updated last month
- eeprog is a Linux C program that allows you to read and write to 24Cxx EEPROMs.☆13Apr 26, 2023Updated 3 years ago
- Vivado诸多IP，包括图像处理等☆234Jul 28, 2024Updated last year
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆18Apr 13, 2022Updated 4 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆12Jul 14, 2024Updated last year
- EE 272B - VLSI Design Project☆15Jun 24, 2021Updated 4 years ago
- FPGA工程合集-涉及图像、通信、接口、算法等，详见WIKI☆12Sep 7, 2024Updated last year
- Example for running IREE in a bare-metal Arm environment.☆41Feb 24, 2026Updated 2 months ago
- The Demo that was presented at FCCM.☆16Aug 16, 2018Updated 7 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- A repository of my Xilinx Open Hardware 2020 submission including a demo of support vector machines on PYNQ, C++ source code and projects…☆16Jun 27, 2020Updated 5 years ago
- prebuild package for cross compiling riscv☆17Dec 28, 2021Updated 4 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- A curated list of awesome libraries, tutorials, projects and other related to MCU Embedded domain(almost C language). This repository aim…☆29Mar 17, 2026Updated last month
- ☆15Dec 9, 2018Updated 7 years ago
- K210芯片的裸机编程代码使用案例，供学习使用，使用的是亚博智能的K210开发板套件（不是打广告哈）（在design_maix中已经支持了maix bit和maixduino开发板）。☆11Feb 16, 2021Updated 5 years ago
- H265 decoder write in verilog, verified on Xilinx ZYNQ7035☆83Sep 2, 2021Updated 4 years ago
- Project where we conceptualized and designed a simple neural network accelerator, loosely based on the Eyeriss architecture, to accelerat…☆11Dec 13, 2019Updated 6 years ago
- 利用ZYNQ7020实现SAR数据采集系统，其中包含硬件设计代码、上位机、测试程序。☆14Feb 27, 2025Updated last year
- End-to-end encrypted cloud storage - Proton Drive • AdSpecial offer: 40% Off Yearly / 80% Off First Month. Protect your most important files, photos, and documents from prying eyes.
- USB2.0 Device Controller IP Core☆16Aug 18, 2023Updated 2 years ago
- Generates intermediate tensor outputs for tflite☆15Apr 12, 2019Updated 7 years ago
- P4 compatible HLS modules☆11Apr 23, 2018Updated 8 years ago
- A series of mainstream machine learning algorithms implement on FPGA.☆14Sep 1, 2021Updated 4 years ago
- A Rocket-Chip with a Dynamically Randomized LLC☆13Sep 18, 2024Updated last year
- Vitis AI Lab: MNIST classifier☆19Aug 11, 2022Updated 3 years ago
- zynqmp_cam_isp_demo linux软件项目☆23Dec 18, 2022Updated 3 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆25Aug 23, 2021Updated 4 years ago
- ☆14May 28, 2023Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- Guide to deploying deep-learning inference networks and deep vision primitives on SOPHON TPU.☆20Nov 14, 2025Updated 5 months ago
- 基于Android NDK Osd实现，利用了SDL2_TTF把 矢量字体转成bmp格式，然后把bmp转换成yuv格式，在YUV数据上做OSD叠加。☆10Jan 16, 2019Updated 7 years ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆32Apr 25, 2016Updated 10 years ago
- MMC (and derivative standards) host controller☆25Sep 14, 2020Updated 5 years ago
- Bridge serial ports and TCP sockets☆17Sep 21, 2015Updated 10 years ago
- Use Minimal API to perform a minimal Authentication mode☆12Dec 27, 2021Updated 4 years ago
- [ICDCS 2023] Evaluation and Optimization of Gradient Compression for Distributed Deep Learning☆10Apr 28, 2023Updated 3 years ago