xk264：AVC/H.264 Video Encoder IP Core (RTL)
☆67Mar 22, 2023Updated 3 years ago
Alternatives and similar repositories for xk264
Users that are interested in xk264 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- xk265：HEVC/H.265 Video Encoder IP Core (RTL)☆291Apr 9, 2023Updated 3 years ago
- xkDLA：XinKai Deep Learning Accelerator (RTL)☆48Jan 15, 2024Updated 2 years ago
- xkISP：Xinkai ISP IP Core (HLS)☆325Mar 14, 2023Updated 3 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆20Dec 8, 2017Updated 8 years ago
- SystemVerilog code for image processing tasks like demosaicing☆11Jun 28, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆12Jul 20, 2022Updated 4 years ago
- mpp decode h264,rga resize, drm display by hdmi☆15Aug 20, 2020Updated 6 years ago
- eeprog is a Linux C program that allows you to read and write to 24Cxx EEPROMs.☆13Apr 26, 2023Updated 3 years ago
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆18Apr 13, 2022Updated 4 years ago
- Convert H264 stream to flv stream☆11Feb 9, 2015Updated 11 years ago
- This project is designed to delay the output of the video stream in AXI-STREAM format.☆13Jul 14, 2024Updated 2 years ago
- A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs b…☆328May 16, 2021Updated 5 years ago
- 1G eth UDP / IP Stack☆10Jul 17, 2014Updated 12 years ago
- ☆13Oct 6, 2023Updated 3 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- prebuild package for cross compiling riscv☆17Dec 28, 2021Updated 4 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- USB2.0 Device Controller IP Core☆21Aug 18, 2023Updated 3 years ago
- A repository of my Xilinx Open Hardware 2020 submission including a demo of support vector machines on PYNQ, C++ source code and projects…☆16Jun 27, 2020Updated 6 years ago
- Personal portfolio☆13Oct 6, 2026Updated last week
- ☆15Dec 9, 2018Updated 7 years ago
- Bitmap Processing Library & AXI-Stream Video Image VIP☆37Apr 11, 2022Updated 4 years ago
- H265 decoder write in verilog, verified on Xilinx ZYNQ7035☆88Sep 2, 2021Updated 5 years ago
- A simple JPEG2000 hardware encoder☆29Sep 29, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- K210芯片的裸机编程代码使用案例，供学习使用，使用的是亚博智能的K210开发板套件（不是打广告哈）（在design_maix中已经支持了maix bit和maixduino开发板）。☆12Feb 16, 2021Updated 5 years ago
- A series of mainstream machine learning algorithms implement on FPGA.☆15Sep 1, 2021Updated 5 years ago
- 利用ZYNQ7020实现SAR数据采集系统，其中包含硬件设计代码、上位机、测试程序。☆16Feb 27, 2025Updated last year
- A tiny FP8 multiplication unit written in Verilog. TinyTapeout 2 submission.☆14Nov 23, 2022Updated 3 years ago
- Vitis AI Lab: MNIST classifier☆19Aug 11, 2022Updated 4 years ago
- Generates intermediate tensor outputs for tflite☆15Apr 12, 2019Updated 7 years ago
- EE 272B - VLSI Design Project☆15Jun 24, 2021Updated 5 years ago
- IR image processing and demo on a Zybo Z7-20 using a Raspberry Pi night vision vamera☆14Aug 30, 2021Updated 5 years ago
- zynqmp_cam_isp_demo linux软件项目☆24Dec 18, 2022Updated 3 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆27Aug 23, 2021Updated 5 years ago
- Knowledge Graph of FPGA☆14Aug 21, 2021Updated 5 years ago
- Easy-to-use JTAG TAP and Debug Controller core written in Verilog☆37Nov 26, 2018Updated 7 years ago
- P4 compatible HLS modules☆11Apr 23, 2018Updated 8 years ago
- GPU-accelerated RePlAce☆14Jun 11, 2024Updated 2 years ago
- 基于Android NDK Osd实现，利用了SDL2_TTF把矢量字体转成bmp格式，然后把bmp转换成yuv格式，在YUV数据上做OSD叠加。☆10Jan 16, 2019Updated 7 years ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆32Apr 25, 2016Updated 10 years ago