A hardware h264 video encoder written in VHDL. Designed to be synthesized into an FPGA. Initial testing is using Xilinx tools and FPGAs but it is not specific to Xilinx.
☆327May 16, 2021Updated 5 years ago
Alternatives and similar repositories for hardh264
Users that are interested in hardh264 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- ☆98Dec 23, 2016Updated 9 years ago
- Open Source 4k CSI-2 Rx core for Xilinx FPGAs☆425Nov 14, 2018Updated 7 years ago
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- A Synthesizable implementation of H.264 Video Decoding☆42Mar 2, 2016Updated 10 years ago
- xk265：HEVC/H.265 Video Encoder IP Core (RTL)☆292Apr 9, 2023Updated 3 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- H264视频解码verilog实现☆92Aug 11, 2017Updated 9 years ago
- MIPI CSI-2 Camera Sensor Receiver V2 Verilog HDL implementation For any generic FPGA. Tested with IMX219 IMX477 on Lattice Crosslink NX w…☆70Feb 13, 2025Updated last year
- Send video/audio over HDMI on an FPGA☆1,308Jul 13, 2026Updated 3 months ago
- High throughput JPEG decoder in Verilog for FPGA☆283Mar 5, 2022Updated 4 years ago
- A hardware MJPEG encoder and RTP transmitter☆49Jan 15, 2020Updated 6 years ago
- Receiving and processing 1080p HDMI audio and video on the Artix 7 FPGA☆213Feb 28, 2019Updated 7 years ago
- Video compression systems☆24Jul 17, 2014Updated 12 years ago
- JPEG Encoder Verilog☆84Oct 31, 2022Updated 4 years ago
- MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Vid…☆499Jul 29, 2022Updated 4 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- The PoC Library has been forked to github.com/VHDL/PoC. See new address below☆607Jul 30, 2025Updated last year
- Groundhog - Serial ATA Host Bus Adapter☆24Jun 10, 2018Updated 8 years ago
- xk264：AVC/H.264 Video Encoder IP Core (RTL)☆69Mar 22, 2023Updated 3 years ago
- Bluespec H.264 Decoder☆13Jul 17, 2014Updated 12 years ago
- A 32-bit MIPS / RISC-V core & SoC, 1.55 DMIPS/MHz, 2.96 CM/Mhz☆426Oct 27, 2026Updated last week
- Software Defined Radio in FPGA uses LVDS IO pins as 1-bit ADC☆128Oct 18, 2016Updated 10 years ago
- H265 decoder write in verilog, verified on Xilinx ZYNQ7035☆88Sep 2, 2021Updated 5 years ago
- A simple JPEG2000 hardware encoder☆29Sep 29, 2020Updated 6 years ago
- Verilog IP Cores & Tests☆13May 3, 2018Updated 8 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Works in Progress and Experiments for the Innova-2 Flex XCKU15P-based Board☆18Apr 4, 2024Updated 2 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆85Oct 17, 2026Updated 2 weeks ago
- TLUT tool flow for parameterised configurations for FPGAs☆17Aug 5, 2024Updated 2 years ago
- Real Digital Vivado IP Library☆10Nov 13, 2022Updated 3 years ago
- Design and implementation of a video decoder on an Altera Cyclone V FPGA board.☆24Jun 6, 2026Updated 4 months ago
- SpaceWire☆14Jul 17, 2014Updated 12 years ago
- A Verilog implementation of DisplayPort protocol for FPGAs☆276Mar 15, 2019Updated 7 years ago
- Xilinx Virtual Cable Daemon☆20Nov 20, 2019Updated 6 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆25Jan 12, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- ☆25Mar 19, 2021Updated 5 years ago
- We are aimed at making a device for shooting real-time HDR (High Dynamic Range) video using FPGA.☆32May 18, 2019Updated 7 years ago
- mirror of https://git.elphel.com/Elphel/x393_sata☆37May 12, 2020Updated 6 years ago
- A plain VHDL implementation of a small microprocessor fully compatible with the ISA of the well known PicoBlaze by Ken Chapman.☆23Jun 6, 2021Updated 5 years ago
- ☆710Oct 13, 2026Updated 3 weeks ago
- cryptography ip-cores in vhdl / verilog☆43Feb 20, 2021Updated 5 years ago
- IP Camera with S3 SOC from Allwinner, PoE Gigabit, LCD, micro SD, Flash☆41Apr 24, 2020Updated 6 years ago