CoreyChen922 / sata3_host_controllerLinks
It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.
☆76Updated last year
Alternatives and similar repositories for sata3_host_controller
Users that are interested in sata3_host_controller are comparing it to the libraries listed below
Sorting:
- ☆80Updated 3 years ago
- ☆34Updated 4 years ago
- ☆20Updated 4 years ago
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- ☆89Updated 8 years ago
- AXI Interface Nand Flash Controller (Sync mode)☆99Updated last year
- 国产VU13P加速卡资料☆82Updated 9 months ago
- ☆36Updated 5 years ago
- SPI-Flash XIP Interface (Verilog)☆48Updated 4 years ago
- MIPI I3C Basic v1.0 communication Slave source code in Verilog with BSD license to support use in sensors and other devices.☆132Updated 5 years ago
- Gigabit Ethernet UDP communication driver☆80Updated 6 years ago
- Ethernet MAC IP Core for 100G/50G/40G/25G/10Gbps☆46Updated 2 years ago
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- USB 2.0 Device IP Core☆73Updated 8 years ago
- Verilog Ethernet Switch (layer 2)☆50Updated 2 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆84Updated last year
- Implementation of JESD204B Transport Layer & part of Data Link Layer☆39Updated 4 years ago
- Example design for the Ethernet FMC using 4 AXI Ethernet Subsystem IP blocks☆72Updated 8 months ago
- UART -> AXI Bridge☆69Updated 4 years ago
- VHDL code for using Xilnx LVDS lines for MIPI CSI-2 TX protocol. For educational purposes☆76Updated 2 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆60Updated 3 years ago
- Interface Protocol in Verilog☆51Updated 6 years ago
- 100 MB/s Ethernet MAC Layer Switch☆15Updated 11 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆81Updated 4 years ago
- Ethernet 10GE MAC☆45Updated 11 years ago
- RTL Verilog library for various DSP modules☆93Updated 3 years ago
- FTDI FT600 SuperSpeed USB3.0 to AXI bus master☆97Updated 5 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆141Updated last year
- Hardware, Linux Driver and Library for the Zynq AXI DMA interface☆104Updated 7 years ago
- A SATA host (HBA) core based on Xilinx FPGA with GTH to read/write hard disk. 一个基于Xilinx FPGA中的GTH的SATA host控制器,用来读写硬盘。☆130Updated 2 years ago