mng2 / AcornCLE215p
Info and example projects for the SQRL Acorn FPGA board
☆10Updated 2 years ago
Related projects ⓘ
Alternatives and complementary repositories for AcornCLE215p
- USB 1.1 Device IP Core☆18Updated 7 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 4 years ago
- Small footprint and configurable Inter-Chip communication cores☆54Updated last month
- A configurable USB 2.0 device core☆30Updated 4 years ago
- CRUVI Standard Specifications☆17Updated 6 months ago
- Löwe FPGA Board☆12Updated last year
- This repository contains a makefile to easily install Symbiflow for the Xilinx 7 Series boards.☆10Updated 3 years ago
- Time to Digital Converter (TDC)☆27Updated 3 years ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆19Updated 4 years ago
- ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)☆22Updated last week
- a small simple slow serial FPGA core☆16Updated 3 years ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆24Updated 8 months ago
- USB Full-Speed core written in migen/LiteX☆17Updated 5 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆17Updated 2 years ago
- Demo of how to use https://github.com/openXC7 tools (yosys+nextpnr-xilinx) to implement the HW side of a custom SoC with RISC-V CPU & our…☆18Updated 3 weeks ago
- A ZipCPU based demonstration of the MAX1000 FPGA board☆21Updated 3 years ago
- Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board☆12Updated 2 years ago
- Open-source CSI-2 receiver for Xilinx UltraScale parts☆35Updated 5 years ago
- ☆20Updated 2 years ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆19Updated 2 years ago
- Ethernet MAC 10/100 Mbps☆24Updated 3 years ago
- ULPI Link Wrapper (USB Phy Interface)☆24Updated 4 years ago
- Cross compile FPGA tools☆22Updated 3 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆27Updated 2 years ago
- Fully featured implementation of Inter-IC (I2C) bus master for FPGAs☆22Updated 4 years ago
- Master-thesis-final☆17Updated last year
- Bit streams forthe Ulx3s ECP5 device☆16Updated last year
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆50Updated last year
- A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.☆27Updated 4 years ago