Alternatives and similar repositories for AcornCLE215p:

Users that are interested in AcornCLE215p are comparing it to the libraries listed below

• www-asics-ws / usb1_device
  USB 1.1 Device IP Core
  ☆20Updated 7 years ago
• enjoy-digital / liteiclink
  Small footprint and configurable Inter-Chip communication cores
  ☆57Updated last month
• quartiq / bscan_spi_bitstreams
  FPGA gateware and pre-build bitstreams that expose SPI over JTAG. The protocol is implemented (among others) by openocd.
  ☆53Updated 2 years ago
• dawsonjon / chips_v
  RISC-V System on Chip Builder
  ☆12Updated 4 years ago
• tgingold / OpenTDC
  Time to Digital Converter (TDC)
  ☆30Updated 4 years ago
• GuzTech / shdl6800
  shdl6800: A 6800 processor written in SpinalHDL
  ☆26Updated 5 years ago
• freecores / wb_builder
  WISHBONE Builder
  ☆14Updated 8 years ago
• gnuradio / gr-verilog
  ☆16Updated 2 years ago
• alexforencich / verilog-ft245
  Verilog FT245 to AXI stream interface
  ☆28Updated 6 years ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆37Updated 5 years ago
• antmicro / usb-test-suite-cocotb-usb
  ☆11Updated 3 years ago
• cloudxcc / Arduissimo
  Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).
  ☆20Updated 5 years ago
• YosysHQ / yosys-plugins
  Yosys Plugins
  ☆21Updated 5 years ago
• mattvenn / understanding-tinyfpga-bootloader
  understanding the tinyfpga bootloader
  ☆24Updated 6 years ago
• YosysHQ / yosys-bench
  Benchmarks for Yosys development
  ☆23Updated 5 years ago
• FMCHUB / FMC_SINGLE_LPC_BREAKOUT
  A breakout board for FPGA Mezzanine Card (FMC) Low-pin count connectors.
  ☆19Updated 5 years ago
• drom / logidrom
  Digital Circuit rendering engine
  ☆38Updated last year
• hdl-util / i2c
  Fully featured implementation of Inter-IC (I2C) bus master for FPGAs
  ☆26Updated 4 years ago
• icebreaker-fpga / icebreaker-amaranth-examples
  This repository contains iCEBreaker examples for Amaranth HDL.
  ☆38Updated last year
• iammituraj / FIFOs
  Register-based and RAM-based FIFOs designed in Verilog/System Verilog.
  ☆16Updated 7 months ago
• antmicro / usb-test-suite-build
  Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores
  ☆50Updated last year
• FPGANinjas / nitefury_pcie_xdma_ddr
  Interface Xilinx XDMA PCIe with DDR3 using MIG-IP on Artix-7 FPGA using Nitefury dev board
  ☆12Updated 2 years ago
• iDoka / eda-scripts
  Collect of various scripts for helping work with EDA-tools (ASIC, FPGA, etc)
  ☆32Updated 9 months ago
• Paebbels / PicoBlaze-Library
  The PicoBlaze-Library offers several PicoBlaze devices and code routines to extend a common PicoBlaze environment to a little System on a…
  ☆35Updated 4 years ago
• gsomlo / yoloRISC
  A RocketChip rv64imac blinky for yosys/nextpnr/trellis & the Lattice ECP5 fpga
  ☆26Updated 5 years ago
• bunnie / netv2-fpga-basic-overlay
  Vivado design for basic NeTV2 FPGA with chroma-based overlay
  ☆20Updated 8 years ago
• YosysHQ / setup-oss-cad-suite
  Set up your GitHub Actions workflow with a OSS CAD Suite
  ☆16Updated last year
• htfab / rotfpga
  A reconfigurable logic circuit made of identical rotatable tiles.
  ☆21Updated 3 years ago
• TUT-ASI / leon3-grlib-gpl-mirror
  Automated Git mirror of Gaisler's GRLIB/Leon3 releases
  ☆17Updated 3 months ago
• lambdaconcept / lambdaUSB
  A configurable USB 2.0 device core
  ☆30Updated 4 years ago