machdyne / lowe
Löwe FPGA Board
☆12Updated last year
Alternatives and similar repositories for lowe:
Users that are interested in lowe are comparing it to the libraries listed below
- snap package for nextpnr PnR FPGA toolchain for Xilinx 7 series FPGAs, with Spartan7, Artix7, Zynq7 and Kintex7 support☆28Updated 9 months ago
- Bit streams forthe Ulx3s ECP5 device☆16Updated 2 years ago
- Test of a RP2040 PMOD attached to a LiteX SoC.☆25Updated last year
- Open source Logic Analyzer based on LiteX SoC☆25Updated 3 months ago
- Full Speed USB DFU interface for FPGA and ASIC designs☆17Updated last year
- FLIX-V: FPGA, Linux and RISC-V☆41Updated last year
- Quickly update a bitstream with new RAM contents☆15Updated 3 years ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- Conecting the Litefury FPGA accelerator to Raspberry Pi 5 over PCIe gen2 x1☆28Updated last year
- sump3 logic analyzer☆19Updated 3 months ago
- CRUVI Standard Specifications☆18Updated 11 months ago
- Firmware to implement USB communications on the CH32V307 microcontroller☆11Updated 2 years ago
- ☆12Updated 3 years ago
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆11Updated 3 years ago
- Drop In USB CDC ACM core for iCE40 FPGA☆34Updated 3 years ago
- This repository contains a makefile to easily install Symbiflow for the Xilinx 7 Series boards.☆10Updated 3 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆21Updated last year
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆18Updated 2 years ago
- Master-thesis-final☆19Updated last year
- PLEASE MOVE TO PAWSv2☆17Updated 3 years ago
- Use ECP5 JTAG port to interact with user design☆26Updated 3 years ago
- Repository for the rp2040_pmod board from controlpaths devices.☆19Updated last year
- Experiments with Cologne Chip's GateMate FPGA architecture☆15Updated last year
- Experimental FPGA project for streaming two MIPI CSI camera streams to an HDMI monitor using a ULX3S FPGA board☆29Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆21Updated 3 years ago
- shdl6800: A 6800 processor written in SpinalHDL☆26Updated 5 years ago
- An all-digital GPS disciplined oscillator using MMCM phase shift.☆28Updated 2 years ago
- Co-simulation and behavioural verification with VHDL, C/C++ and Python/m☆13Updated this week
- A general slow DDR3 interface. Very little resource consumption. Suits for all FPGAs with 1.5V IO voltage.☆38Updated 11 months ago