grayresearch / s4gaLinks
a small simple slow serial FPGA core
☆16Updated 4 years ago
Alternatives and similar repositories for s4ga
Users that are interested in s4ga are comparing it to the libraries listed below
Sorting:
- ☆33Updated 3 years ago
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆32Updated last year
- A reconfigurable logic circuit made of identical rotatable tiles.☆24Updated 4 years ago
- Bitstream relocation and manipulation tool.☆51Updated 3 years ago
- 🔥 Technology-agnostic FPGA stress-test: maximum logic utilization and high dynamic power consumption.☆32Updated 3 years ago
- Xilinx Unisim Library in Verilog☆86Updated 5 years ago
- ☆34Updated 5 years ago
- Generate Zynq configurations without using the vendor GUI☆30Updated 2 years ago
- Basic USB 1.1 Host Controller for small FPGAs☆97Updated 5 years ago
- A collection of debugging busses developed and presented at zipcpu.com☆42Updated 2 years ago
- A configurable USB 2.0 device core☆32Updated 5 years ago
- Virtual Development Board☆64Updated 4 years ago
- Generic FPGA SDRAM controller, originally made for AS4C4M16SA☆83Updated 5 years ago
- Virtual development board for HDL design☆42Updated 2 years ago
- PCIe analyzer experiments☆65Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆66Updated last week
- SoftCPU/SoC engine-V☆55Updated 10 months ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆22Updated 6 years ago
- FPGA IP cores for the Antikernel OS, intended to be included as a submodule in SoC integrations☆70Updated last month
- A minimal-area RISC-V core with a scalable data path to 1, 2, 4, or 8 bits and manifold variants.☆111Updated last week
- PicoRV☆43Updated 5 years ago
- The ILA allows you to perform in-system debugging of your designs on the GateMate FPGA at runtime. All signals of your design inside the …☆59Updated 2 months ago
- Cocotb (Python) based USB 1.1 test suite for FPGA IP, with testbenches for a variety of open source USB cores☆53Updated 2 years ago
- Open Source AES☆31Updated 4 months ago
- Mirror of https://codeberg.org/ECP5-PCIe/ECP5-PCIe☆102Updated 2 years ago
- Reusable Verilog 2005 components for FPGA designs☆49Updated last month
- ☆22Updated 3 years ago
- ☆16Updated last year
- Demo SoC for SiliconCompiler.☆62Updated 2 weeks ago
- Spen's Official OpenOCD Mirror☆51Updated 11 months ago