Alternatives and similar repositories for oc_jpegencode:

Users that are interested in oc_jpegencode are comparing it to the libraries listed below

• alexforencich / xfcp
  Extensible FPGA control platform
  ☆56Updated last year
• Cognoscan / AxiCores
  AXI4-Compatible Verilog Cores, along with some helper modules.
  ☆16Updated 4 years ago
• Elphel / eddr3
  mirror of https://git.elphel.com/Elphel/eddr3
  ☆40Updated 7 years ago
• hdlguy / make_for_vivado
  experimentation with gnu make for Xilinx Vivado compilation. dependencies can be complicated.
  ☆22Updated last year
• PyHDI / ipgen
  IP-core package generator for AXI4/Avalon
  ☆22Updated 6 years ago
• antmicro / cocotb-verilator-build
  ☆26Updated last year
• freecores / ethmac
  Ethernet MAC 10/100 Mbps
  ☆79Updated 5 years ago
• airhdl / spi-to-axi-bridge
  An SPI to AXI4-lite bridge for easy interfacing of airhdl register banks with any microcontroller.
  ☆46Updated last year
• Elphel / x393_sata
  mirror of https://git.elphel.com/Elphel/x393_sata
  ☆33Updated 4 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆29Updated 8 years ago
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆32Updated 6 years ago
• magro732 / OpenRIO
  Contains VHDL IP-blocks to create stand-alone RapidIO-endpoints, RapidIO-switches and RapidIO-switches with local endpoints.
  ☆34Updated 7 years ago
• sbourdeauducq / serdes-tdc
  SERDES-based TDC core for Spartan-6
  ☆18Updated 12 years ago
• taichi-ishitani / rggen
  This repository is no longer maintained. New repository is here(https://github.com/rggen/rggen).
  ☆16Updated 5 years ago
• alexforencich / corundum
  Open source FPGA-based NIC and platform for in-network compute
  ☆60Updated 2 months ago
• Architech-Silica / Designing-a-Custom-AXI-Slave-Peripheral
  A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools
  ☆40Updated 6 years ago
• olofk / wb_intercon
  Wishbone interconnect utilities
  ☆38Updated 8 months ago
• CESNET / ofm
  Open FPGA Modules
  ☆23Updated 3 months ago
• freecores / xge_mac
  Ethernet 10GE MAC
  ☆45Updated 10 years ago
• hellgate202 / csi2_rx
  MIPI CSI-2 RX
  ☆30Updated 3 years ago
• paulscherrerinstitute / psi_common
  Common elements for FPGA Design (FIFOs, RAMs, etc.)
  ☆32Updated this week
• ultraembedded / core_usb_bridge
  USB -> AXI Debug Bridge
  ☆35Updated 3 years ago
• freecores / axi_master
  Generic AXI master stub
  ☆19Updated 10 years ago
• suoto / fpga_cores
  ☆32Updated last year
• paulscherrerinstitute / psi_fpga_all
  Collection of all FPGA related PSI libraries in the correct folder strucutre. Each library is included as submodule.
  ☆28Updated 9 months ago
• stevenbell / csirx
  Open-source CSI-2 receiver for Xilinx UltraScale parts
  ☆35Updated 5 years ago
• Featherweight-IP / fwrisc
  Featherweight RISC-V implementation
  ☆52Updated 3 years ago
• alexforencich / verilog-ft245
  Verilog FT245 to AXI stream interface
  ☆28Updated 6 years ago
• rgwan / AMBA
  Collection of IPs based on AMBA (AHB, APB, AXI) protocols
  ☆19Updated 7 years ago
• sjaeckel / axi-bfm
  git clone of http://code.google.com/p/axi-bfm/
  ☆17Updated 11 years ago