Verilog HDL files
☆186Aug 5, 2026Updated this week
Alternatives and similar repositories for Digital-Design
Users that are interested in Digital-Design are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- We open-source our layout level fast EM simulation tool, EMSim, to the public.☆15Feb 8, 2024Updated 2 years ago
- Bluetooth Low Energy (BLE) digital multimeter workshop, featuring the nPM2100 + nRF54L15☆17Sep 19, 2025Updated 10 months ago
- Implementing Different Adder Structures in Verilog☆77Sep 3, 2019Updated 6 years ago
- TerosHDL documentation☆13Jul 27, 2025Updated last year
- Performance Evaluation of AF_XDP Communication Patterns. Artifacts for "Are Kernel Drivers Ready For Accelerated Packet Processing Using …☆12Jun 11, 2024Updated 2 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆51Dec 3, 2023Updated 2 years ago
- Verilog Code for I2C Protocol☆19Nov 12, 2020Updated 5 years ago
- Example SystemVerilog UVM Environment☆11Jun 23, 2015Updated 11 years ago
- Image Processing Toolbox in Verilog using Basys3 FPGA☆241May 20, 2025Updated last year
- A simple 8 bit UART implementation in Verilog, with tests and timing diagrams☆42Oct 3, 2025Updated 10 months ago
- Real-Time Image Processing for ASIC/FGPA☆27Feb 23, 2022Updated 4 years ago
- All switching software as well as control software for a physically and emulated capable network coding switch. FPGA Acceleration added .…☆10Nov 19, 2019Updated 6 years ago
- VHDL design for rotary encoder. Can be used accessed via digital signals or AXI interface.☆13Mar 24, 2017Updated 9 years ago
- A repository aggregating links to essential documentation, tutorials, and research papers for hardware Design Verification.☆66Jun 7, 2026Updated 2 months ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Simple fixed-cycle SDRAM Controller☆28Apr 26, 2026Updated 3 months ago
- Pulse generator on Basys 3 FPGA board☆11Aug 14, 2019Updated 6 years ago
- VerilogAI – A specialized chatbot for Verilog. Supports code generation, debugging, and explanation with custom prompt engineering and AP…☆18Apr 26, 2026Updated 3 months ago
- A Verilog design of LeNet-5, a Convolutional Neural Network architecture☆36Jun 30, 2020Updated 6 years ago
- RiSC 16 is a simple 16 bit instruction set with 8 instructions and 3 instruction formats. This is an RTL implementation in verilog, instr…☆12Jan 24, 2022Updated 4 years ago
- This repository contains the design files of RISC-V Pipeline Core☆76May 11, 2023Updated 3 years ago
- An adapter board with pin headers for low-pin count (LPC) FPGA Mezzanine Cards (FMC).☆12Nov 2, 2020Updated 5 years ago
- ☆23Oct 6, 2025Updated 10 months ago
- Start a blockchain on raspberry pi☆10May 30, 2018Updated 8 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…☆32Jun 4, 2024Updated 2 years ago
- QQSPI Pmod-compatible 32MB PSRAM module☆16Sep 14, 2023Updated 2 years ago
- Computer Architecture -VLSI -Verilog Codes-Xilinx-Irsim☆14May 8, 2021Updated 5 years ago
- ☆102Aug 31, 2021Updated 4 years ago
- BYU Pynq PR Video Pipeline Hardware☆13Oct 2, 2025Updated 10 months ago
- ☆13Dec 1, 2024Updated last year
- Library of reusable VHDL components☆28Mar 7, 2024Updated 2 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆20Jul 23, 2022Updated 4 years ago
- ☆13Apr 1, 2017Updated 9 years ago
- 1-Click AI Models by DigitalOcean Gradient • AdDeploy popular AI models on DigitalOcean Gradient GPU virtual machines with just a single click. Zero configuration with optimized deployments.
- The RTL desings for the AMBA APB3 Master and Generic Slave ( Memory Interface-able )☆19Dec 12, 2025Updated 7 months ago
- Asynchronous fifo in verilog☆38Mar 20, 2016Updated 10 years ago
- Implementing 32 Verilog Mini Projects. 32 bit adder, Array Multiplier, Barrel Shifter, Binary Divider 16 by 8, Booth Multiplication, CRC …☆20Aug 6, 2025Updated last year
- Verilog Design Examples with self checking testbenches. Half Adder, Full Adder, Mux, ALU, D Flip Flop, Sequence Detector using Mealy mach…☆210Jan 29, 2024Updated 2 years ago
- Simple 8-bit UART realization on Verilog HDL.☆120Apr 27, 2024Updated 2 years ago
- 6502 emulator for the Raspberry pi pico.☆33Oct 23, 2023Updated 2 years ago
- A Standalone Structural Verilog Parser☆97Mar 31, 2022Updated 4 years ago