Energy-efficient Event-driven Spiking Neural Network accelerator for FPGA with PyTorch integration
☆113Feb 10, 2026Updated 3 weeks ago
Alternatives and similar repositories for Event-Driven-Spiking-Neural-Network-Accelerator-for-FPGA
Users that are interested in Event-Driven-Spiking-Neural-Network-Accelerator-for-FPGA are comparing it to the libraries listed below
Sorting:
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆15Sep 9, 2023Updated 2 years ago
- SNN on FPGA☆12Apr 26, 2022Updated 3 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Feb 9, 2020Updated 6 years ago
- Spiking Neural Network RTL Implementation☆65Jun 8, 2021Updated 4 years ago
- ☆20Apr 7, 2021Updated 4 years ago
- A Spiking Neuron Network Project in Verilog Implementation☆26Apr 5, 2018Updated 7 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Feb 10, 2026Updated 3 weeks ago
- ☆30Jun 8, 2022Updated 3 years ago
- A repository FPGA-friendly SNN models☆35Mar 24, 2021Updated 4 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆75Mar 30, 2023Updated 2 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆220Apr 20, 2019Updated 6 years ago
- FPGA Design of a Spiking Neural Network.☆46May 15, 2024Updated last year
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Jun 29, 2020Updated 5 years ago
- Framework for radix encoded SNN on FPGA☆18Dec 7, 2021Updated 4 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆37Sep 25, 2019Updated 6 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆64Jul 28, 2021Updated 4 years ago
- A project dedicated to developing a hardware Integrated Circuit (IC) for a Spike Neural Network (SNN), powered by the RTL code generated …☆66Feb 18, 2024Updated 2 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆205Nov 4, 2023Updated 2 years ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆22Nov 27, 2025Updated 3 months ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆39Jun 14, 2019Updated 6 years ago
- [TCAD'24] This repository contains the source code for the paper "FireFly v2: Advancing Hardware Support for High-Performance Spiking Neu…☆23May 9, 2024Updated last year
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆20Jun 17, 2020Updated 5 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆15Dec 14, 2021Updated 4 years ago
- Advanced Machine Learning Fall 2020 Project Repository☆12Dec 12, 2020Updated 5 years ago
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆29Jul 7, 2019Updated 6 years ago
- A simple from scratch implementation of a Spiking-Neural-Network with STDP in Python which is beeing trained on MNIST.☆47Aug 30, 2024Updated last year
- CS4362 - Hardware Description Languages. Implemented SNN on an FPGA for real-time image processing using VHDL☆23Dec 29, 2023Updated 2 years ago
- ☆17Mar 2, 2021Updated 5 years ago
- This Pytorch-based framework demonstrates a sentiment analysis task in the IMDB movie reviews dataset using an SNN with a statistic memri…☆24Jan 14, 2023Updated 3 years ago
- Fully opensource spiking neural network accelerator☆168Feb 13, 2023Updated 3 years ago
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆15Feb 16, 2024Updated 2 years ago
- Efficient single-pass hyperdimensional classifier. Mirror of https://gitlab.com/biaslab/onlinehd☆11Jan 31, 2021Updated 5 years ago
- Original DVS128 Gesture Dataset in PyTorch☆13Jun 6, 2023Updated 2 years ago
- The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researche…☆16Jan 6, 2023Updated 3 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 2 years ago
- ☆56Jan 29, 2024Updated 2 years ago
- FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)☆11Dec 12, 2023Updated 2 years ago
- An FPGA design for simulating biological neurons☆17Jul 5, 2024Updated last year
- ☆100Mar 18, 2020Updated 5 years ago