metr0jw / Event-Driven-Spiking-Neural-Network-Accelerator-for-FPGALinks
FPGA based Leaky Integrate and Fire (LIF) neuron model accelerator for PyTorch
☆85Updated this week
Alternatives and similar repositories for Event-Driven-Spiking-Neural-Network-Accelerator-for-FPGA
Users that are interested in Event-Driven-Spiking-Neural-Network-Accelerator-for-FPGA are comparing it to the libraries listed below
Sorting:
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆40Updated 5 years ago
- Spiking Neural Network RTL Implementation☆61Updated 4 years ago
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆205Updated 6 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Updated 5 years ago
- A repository FPGA-friendly SNN models☆34Updated 4 years ago
- FPGA Design of a Spiking Neural Network.☆43Updated last year
- ReckOn: A Spiking RNN Processor Enabling On-Chip Learning over Second-Long Timescales - HDL source code and documentation.☆91Updated 3 years ago
- Framework for radix encoded SNN on FPGA☆16Updated 3 years ago
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆60Updated 8 months ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆36Updated 6 years ago
- [FPL 2021] SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs.☆62Updated 4 years ago
- SNN on FPGA☆11Updated 3 years ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆191Updated 2 years ago
- tinyODIN digital spiking neural network (SNN) processor - HDL source code and documentation.☆73Updated 2 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆38Updated 6 years ago
- ☆20Updated 4 years ago
- A nest brain simulator based on FPGA(LIF NEURON)☆14Updated 3 years ago
- ☆51Updated last year
- ☆95Updated 5 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Updated 2 years ago
- A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The se…☆14Updated 2 years ago
- ☆17Updated 4 years ago
- I will share some useful or interesting papers about neuromorphic processor☆27Updated 9 months ago
- This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, an…☆21Updated last year
- Notebooks and code for Neuromorphic Hardware Workshop at ISFPGA 2024.☆60Updated last year
- SATA_Sim is an energy estimation framework for Backpropagation-Through-Time (BPTT) based Spiking Neural Networks (SNNs) training and infe…☆28Updated last year
- IEEE Transactions on Circuits and Systems I: Efficient FPGA Implementations of Pair and Triplet-based STDP for Neuromorphic Architectures☆27Updated 6 years ago
- ☆28Updated 3 years ago
- Modeling of memristors in LTSpise environment☆34Updated 3 months ago
- ☆43Updated 3 years ago