A three-layer LIF neuron SNN accelerator. The first layer is the input layer and has 784 neurons, that receive the encoded spikes. The second layer is the hidden layer and has 100 neurons; the last layer is the output layer with 10 neurons.
☆17Sep 9, 2023Updated 3 years ago
Alternatives and similar repositories for SNN-Accelerator
Users that are interested in SNN-Accelerator are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Energy-efficient Event-driven Spiking Neural Network accelerator for FPGA with PyTorch integration☆139Aug 28, 2026Updated last month
- A Spiking Neuron Network Project in Verilog Implementation☆28Apr 5, 2018Updated 8 years ago
- Code for the ISCAS23 paper "The Hardware Impact of Quantization and Pruning for Weights in Spiking Neural Networks"☆11Apr 20, 2023Updated 3 years ago
- A project dedicated to developing a hardware Integrated Circuit (IC) for a Spike Neural Network (SNN), powered by the RTL code generated …☆73Feb 18, 2024Updated 2 years ago
- ☆34Jun 8, 2022Updated 4 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- HedgeHog Fused Spiking Neural Network Emulator/Compute Engine is a hardware implementation of a SNN designed for implementation in Xilinx…☆62Feb 10, 2026Updated 8 months ago
- SNN on FPGA☆13Apr 26, 2022Updated 4 years ago
- Update papers about the Accelerators for Spiking Neural Networks.☆21Mar 20, 2024Updated 2 years ago
- Hardware implementation of Spiking Neural Network on a PYNQ-Z1 board☆41Jun 14, 2019Updated 7 years ago
- CORDIC-SNN, followed with "Unsupervised learning of digital recognition using STDP" published in 2015, frontiers☆25Feb 9, 2020Updated 6 years ago
- FPGA acceleration of a Spike-Timing-Dependent Plasticity learning algorithm for Spiking Neural Networks☆42Jun 29, 2020Updated 6 years ago
- ☆21Apr 7, 2021Updated 5 years ago
- Offical implementation of High-Performance Temporal Reversible Spiking Neural Networks with $O(L)$ Training Memory and $O(1)$ Inference C…☆23Feb 3, 2026Updated 8 months ago
- MINT, Multiplier-less INTeger Quantization for Energy Efficient Spiking Neural Networks, ASP-DAC 2024, Nominated for Best Paper Award☆16Apr 12, 2024Updated 2 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- ODIN online-learning digital spiking neural network (SNN) processor - HDL source code and documentation.☆241Apr 20, 2019Updated 7 years ago
- Spiking Neural Network RTL Implementation☆72Jun 8, 2021Updated 5 years ago
- FPGA Design of a Spiking Neural Network.☆53May 15, 2024Updated 2 years ago
- LSTM neural network (verilog)☆16Dec 5, 2018Updated 7 years ago
- Accelerated Image Reconstruction using Generative Adversarial Networks on Cloud FPGAs☆11Aug 27, 2021Updated 5 years ago
- Intelligent-Computing-Lab-Panda / Exploring-Temporal-Information-Dynamics-in-Spiking-Neural-NetworksPyTorch Implementation of Exploring Temporal Information Dynamics in Spiking Neural Networks (AAAI23)☆32Nov 25, 2022Updated 3 years ago
- A repository FPGA-friendly SNN models☆38Mar 24, 2021Updated 5 years ago
- ☆23Sep 28, 2026Updated 2 weeks ago
- PyTorch implementation of SegBlocks: Towards Block-Based Adaptive Resolution Networks for Fast Segmentation (ECCV2020 Embedded Vision Wor…☆19Mar 31, 2023Updated 3 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- Resource Utilization and Latency Estimation for ML on FPGA.☆20Apr 11, 2026Updated 6 months ago
- Repository collecting papers about neuromorphic hardware, such as ASIC and FPGA implementations of SNNs and stuff.☆225Nov 4, 2023Updated 2 years ago
- xkDLA：XinKai Deep Learning Accelerator (RTL)☆48Jan 15, 2024Updated 2 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆43Jan 8, 2021Updated 5 years ago
- Spiking neural network implementation using Verilog with LIF (Leaky Integrate-and-Fire) neurons☆21Jun 17, 2020Updated 6 years ago
- The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL☆38Sep 25, 2019Updated 7 years ago
- RTL code for the DPU chip designed for irregular graphs☆14May 30, 2022Updated 4 years ago
- Advancing Spiking Neural Networks towards Deep Residual Learning☆64Apr 3, 2025Updated last year
- Complete UCIe v2.0 Controller RTL Implementation with Revolutionary 128 Gbps PAM4 Signaling - Architecture Design Complete, Ready for RTL…☆37Aug 30, 2025Updated last year
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- codes of the paper Rate Gradient Approximation Attack Threats Deep Spiking Neural Networks (CVPR 2023)☆16Aug 19, 2024Updated 2 years ago
- Fully opensource spiking neural network accelerator☆179Feb 13, 2023Updated 3 years ago
- Continuous Remote Sensing Image Super-Resolution via Neural Operator Diffusion☆28Mar 4, 2025Updated last year
- Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis☆29Feb 16, 2024Updated 2 years ago
- GPU-accelerated RePlAce☆14Jun 11, 2024Updated 2 years ago
- ☆26Mar 28, 2025Updated last year
- ☆19Aug 11, 2022Updated 4 years ago