Alternatives and similar repositories for Crash_Course_for_New_Members

Users that are interested in Crash_Course_for_New_Members are comparing it to the libraries listed below

• mediaic / VLSI_Lab1
  RTL + Synthesis + APR
  ☆11Updated 3 months ago
• max2468tw / IC_Lab
  NCTU 2018 Spring Integrated Circuit Design Laboratory
  ☆24Updated 7 years ago
• sheldonucr / ee260_lab
  EE 260 Winter 2017: Advanced VLSI Design
  ☆67Updated 8 years ago
• yutongshen / RISC-V_SoC
  ☆39Updated 2 years ago
• bol-edu / HLS-SOC-Discussions
  Discussion Forum for High-Level Synthesis (HLS) Courses in Taiwan.
  ☆54Updated 2 years ago
• g0kul / vcnn
  Verilog Convolutional Neural Network on PYNQ
  ☆28Updated 7 years ago
• akilm / Physical-Design
  Physical Design Flow from RTL to GDS using Opensource tools.
  ☆113Updated 5 years ago
• twweeb / VLSI-Physical-Design-Automation
  Courseworks of CS6165 VLSI Physical Design Automation, NTHU.
  ☆49Updated 4 years ago
• hankshyu / ICLab-2023
  Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)
  ☆148Updated last year
• albertfan1120 / NTU_CVSD_2021
  Computer-Aided VLSI System Design
  ☆23Updated last year
• ZFTurbo / MobileNet-in-FPGA
  Generator of verilog description for FPGA MobileNet implementation
  ☆178Updated 3 years ago
• pontazaricardo / Verilog_Calculator_Matrix_Multiplication
  This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.
  ☆53Updated 8 years ago
• zli87 / Integrated_Circuit_Design_Laboratory_IC_Lab
  Integrated Circuit Design Laboratory(IC Lab) at 2019 Fall, NCTU. Final project is a customized 16 bits ISA processor.
  ☆23Updated 4 years ago
• hlslibs / hls_tutorials
  Tutorials on HLS Design
  ☆52Updated 5 years ago
• derek8955 / ic_contest
  IC Contest
  ☆42Updated 2 years ago
• laplaceyc / VLSI_Design-Implementation
  This repo is "NTHU VLSI System Design and Implementation" course project.
  ☆13Updated 8 years ago
• Ni-ChiTing / IC_contest_cell_based_design
  ☆14Updated 4 years ago
• mitshine / UVM-and-System-Verilog-Manual
  UVM and System Verilog Manuals
  ☆45Updated 6 years ago
• mongrelgem / Verilog-Adders
  Implementing Different Adder Structures in Verilog
  ☆76Updated 6 years ago
• asfhiolNick / NTU_CVSD_202201
  楊家驤老師的"電腦輔助積體電路系統設計"作業(CVSD)
  ☆37Updated last year
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆165Updated 8 years ago
• chenhaoc / cnnhwpe
  ☆66Updated 3 years ago
• jasonlin316 / A-Single-Path-Delay-32-Point-FFT-Processor
  A 32-point pipelined Fast Fourier transform processor, using single path delay architecture, and based on radix2-DIF(decimation-in-freque…
  ☆49Updated 6 years ago
• mediaic / MSoC-HLS
  Multimedia SoC Design with Specialization on Application Acceleration with High-Level-Synthesis [2020 Fall]
  ☆12Updated 4 years ago
• cornell-zhang / facedetect-fpga
  ☆46Updated 5 years ago
• ahmedshahein / DSP-RTL-Lib
  RTL Verilog library for various DSP modules
  ☆92Updated 3 years ago
• bol-edu / course-lab_finn
  ☆13Updated 2 years ago
• ayzk / Simulator_CPU
  Pipeline CPU of MIPS architecture with L1 Data Cache by Verilog
  ☆20Updated 4 years ago
• HsuChiChen / nycu-iclab-2023-fall
  交通大學iclab 2023 fall
  ☆44Updated last year
• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆20Updated 7 years ago