Computer-Aided VLSI System Design
☆26Oct 24, 2024Updated last year
Alternatives and similar repositories for NTU_CVSD_2021
Users that are interested in NTU_CVSD_2021 are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Computer-aided VLSI System design, EEE 5022, National Taiwan University, 2018 Spring☆19Sep 19, 2018Updated 8 years ago
- Professor: C.H. Yang☆10Aug 16, 2025Updated last year
- 丁建均老師的"時頻分析和 小波轉換"作業(TFW)☆14Jan 18, 2024Updated 2 years ago
- ☆13Feb 13, 2022Updated 4 years ago
- 國立陽明交通大學 電子所 積體電路設計實驗 李鎮宜教授☆15Mar 3, 2023Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Digital IC design and vlsi notes☆15Jun 24, 2020Updated 6 years ago
- ☆41Jun 13, 2026Updated 3 months ago
- Spring 2023 NYCU (prev. NCTU) Integrated Circuit Design Laboratory (ICLab)☆180Sep 9, 2024Updated 2 years ago
- IC Contest☆47Mar 28, 2023Updated 3 years ago
- Build a SystemVerilog Environment for an ALU, using OOP testbench components as; stimulus generator, driver, monitor, scoreboard. ALU was…☆10Mar 4, 2023Updated 3 years ago
- ☆13Jan 20, 2021Updated 5 years ago
- 清華大學 | 積體電路設計實驗 (IC LAB) | 110上☆52Oct 14, 2022Updated 3 years ago
- Public repository to host our Checker IP written in SVA that is ported to run on open-source Verilator.☆12Mar 31, 2023Updated 3 years ago
- EE 272B - VLSI Design Project☆15Jun 24, 2021Updated 5 years ago
- Managed Kubernetes at scale on DigitalOcean • AdDigitalOcean Kubernetes includes the control plane, bandwidth allowance, container registry, automatic updates, and more for free.
- ☆46Apr 6, 2023Updated 3 years ago
- ☆39Sep 17, 2024Updated 2 years ago
- Programming assignments for Coursera's U of I VLSI CAD: Logic to Layout☆14May 11, 2014Updated 12 years ago
- A python package for interfacing TI ADCs with a Raspberry Pi☆17Apr 5, 2022Updated 4 years ago
- SystemVerilog files for lab project on a DNN hardware accelerator☆18Jun 22, 2021Updated 5 years ago
- 交大電子所-積體電路實驗設計-李鎮宜教授☆14Sep 4, 2024Updated 2 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 3 years ago
- PSA-ADAC SDC-600 Secure Debug Manager library for authenticated debug☆17Mar 18, 2025Updated last year
- ☆71Apr 7, 2024Updated 2 years ago
- Bare Metal GPUs on DigitalOcean Gradient AI • AdPurpose-built for serious AI teams training foundational models, running large-scale inference, and pushing the boundaries of what's possible.
- NCTU 2021 Spring Integrated Circuit Design Laboratory☆212Apr 2, 2023Updated 3 years ago
- Verilog implementation of a ultrasonic radar☆21Jan 7, 2018Updated 8 years ago
- A Rocket-Chip with a Dynamically Randomized LLC☆13Sep 18, 2024Updated 2 years ago
- APB UVC ported to Verilator☆11Nov 19, 2023Updated 2 years ago
- Instruction and files for porting Arm DesignStart to CW305.☆17Dec 6, 2023Updated 2 years ago
- Design a median filter for a Generic RGB image.☆14Mar 6, 2019Updated 7 years ago
- ☆22Apr 2, 2023Updated 3 years ago
- RTL Synthesis for Fast Arithmetic circuits like Booth encoded Multipliers, Carry Save Adders, Fixed-Point and Floating-Point conversions,…☆22Nov 26, 2018Updated 7 years ago
- My notes for any technologies of Web, Tech, etc.☆10Feb 16, 2020Updated 6 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- 致力于翻译和传播计算机体系结构：量化方法（第6版）☆20Jun 28, 2020Updated 6 years ago
- A pytorch implementation of spiking neural networks and backpropagation through spikes☆13Oct 3, 2024Updated 2 years ago
- a Computing In Memory emULATOR framework☆16May 19, 2024Updated 2 years ago
- CS3339 Computer Architecture class project - 5 stage MIPS-like processor with forwarding, hazard control, no exception handling.☆22Apr 25, 2018Updated 8 years ago
- Z-Core - A Lightweight RISC-V Processor (RV32IMZicsr)☆15Updated this week
- Extended Sensing via Dynamic Tactile Sensors☆10Apr 8, 2024Updated 2 years ago
- Code for the model presented in the paper "LISNN: Improving Spiking Neural Networks with Lateral Interactions for Robust Object Recogniti…☆13Nov 20, 2020Updated 5 years ago