TMDS encoding tools
☆18Jan 11, 2018Updated 8 years ago
Alternatives and similar repositories for tmds_encoding
Users that are interested in tmds_encoding are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Wishbone <-> AXI converters☆13Jun 1, 2015Updated 11 years ago
- Finding the bacteria in rotting FPGA designs.☆14Dec 28, 2020Updated 5 years ago
- Xilinx Virtual Cable Daemon☆20Nov 20, 2019Updated 6 years ago
- JESD204 Eye Scan Visualization Utility☆19Jul 22, 2026Updated last month
- XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.☆19Jul 10, 2020Updated 6 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- A C++ implementation of ChaCha20 & Poly1305 stream cipher described in RFC - 8439.☆25Oct 21, 2024Updated last year
- a PCB that turns the Colorlight 5A-75B into an easy to use development FPGA platform for cheap☆22Apr 19, 2023Updated 3 years ago
- Small footprint and configurable video cores (Deprecated)☆75Sep 15, 2021Updated 4 years ago
- Wishbone to ARM AMBA 4 AXI☆17May 25, 2019Updated 7 years ago
- Worked examples of circuit simulation in Python using PySpice and ngspice☆28May 8, 2018Updated 8 years ago
- FPGA USB 1.1 Low-Speed Implementation☆36Oct 3, 2018Updated 7 years ago
- Paul Layzell's Evolvable Motherboard☆13Sep 14, 2015Updated 10 years ago
- ☆20Nov 5, 2024Updated last year
- Layouts designed in the Angular Material. The Angular Material project is an implementation of Material Design in Angular.js.☆12Jan 18, 2016Updated 10 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Single Header Constexpr Circular Queue☆17Jul 31, 2020Updated 6 years ago
- This repository contains synthesizable examples which use the PoC-Library.☆39Dec 24, 2020Updated 5 years ago
- ☆15Nov 28, 2020Updated 5 years ago
- understanding the tinyfpga bootloader☆25Apr 22, 2018Updated 8 years ago
- ☆26Aug 10, 2023Updated 3 years ago
- Programs a Spartan 6 FPGA over JTAG using an FTDI USB chip.☆16Jul 27, 2019Updated 7 years ago
- Wishbone to AXI bridge (VHDL)☆51Aug 29, 2019Updated 7 years ago
- FLIX-V: FPGA, Linux and RISC-V☆42Nov 5, 2023Updated 2 years ago
- ☆18Sep 16, 2020Updated 5 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- ☆12Oct 17, 2024Updated last year
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆16Feb 16, 2022Updated 4 years ago
- A simple cycle-accurate DaDianNao simulator☆13Mar 27, 2019Updated 7 years ago
- Small footprint and configurable NVMe core.☆17Jul 14, 2026Updated last month
- Parse hardware design information to generate project specific machine configuration☆19Jul 8, 2026Updated last month
- C rewrite of a minimal Python JPEG decoder☆12Jan 2, 2019Updated 7 years ago
- Latest KiCad installed inside a docker container from ppa:js-reynaud/ppa-kicad☆10Mar 23, 2015Updated 11 years ago
- A Vivado IP package of the PicoRV32 RISC-V processor☆15Jul 9, 2020Updated 6 years ago
- iDEA FPGA Soft Processor☆17Jun 9, 2016Updated 10 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- MicroPython library for ev3dev☆10Oct 1, 2017Updated 8 years ago
- A Python package for creating and solving constrained randomization problems.☆19Aug 10, 2026Updated 3 weeks ago
- Generic parse tree, configurable lexer, `lemon` parser generator, wrapped for C++17 and Python 3.☆15Apr 26, 2021Updated 5 years ago
- Synthesizable FIR filters in VHDL☆15Jul 19, 2019Updated 7 years ago
- A High-performance Timing Analysis Tool for VLSI Systems☆10Feb 11, 2021Updated 5 years ago
- SystemVerilog AXI verification library and video-DMA IP: AXI4/Lite/Stream BFMs, triple-buffer VDMA, and multi-tap temporal VDMA with byte…☆24Jul 5, 2026Updated last month
- Portable scanner/printer that turns QR code menus into physical copies.☆16Oct 24, 2023Updated 2 years ago