DOUDIU / Video-Stitching-on-FPGALinks
This open-source repository aims to stitch several separate video streams into a single video using DDR3/4 storage via the AXI interface. The interface can be easily switched to the DDR3/4 located on either the PS or PL side using HP/GP ports or MIG IP.
☆17Updated last year
Alternatives and similar repositories for Video-Stitching-on-FPGA
Users that are interested in Video-Stitching-on-FPGA are comparing it to the libraries listed below
Sorting:
- This project aims to integrate image acquisition with AI acceleration to achieve functions such as multi-channel video source input captu…☆16Updated 2 years ago
- FPGA Camera Parallel & MIPI Verilog☆25Updated last month
- Bilinear interpolation realizes image scaling based on FPGA☆28Updated 5 years ago
- A RTL-based project in Verilog that shows real-time video captured by a CMOS camera OV7670 and displayed on a monitor through VGA at 640 …☆21Updated 2 years ago
- kintex7 ov13850 fpga mipi camera☆20Updated last year
- RTL implementation of TFlite FPGA accelerator and RISC-V controller. 3D Object Detection based on LiDAR Point Clouds.☆13Updated 2 years ago
- The Final Project of team 8, NTUEE, Digital Circuits Lab (2021 Fall)☆37Updated 3 years ago
- Verilog Modules for a Digital PI Controller implemented on a Digilent NEXYS 4-DDR FPGA☆32Updated 5 years ago
- LMS-Adaptive Filter implement using verilog and Matlab☆47Updated 9 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆77Updated last year
- 七路图像在FPGA中实现拼接,代码会不断添加进来。☆28Updated 4 years ago
- FPGA implementation of pose detection with Kalman filter. (verilog)☆35Updated 3 years ago
- Integration of SIFT and LES Algorithms☆13Updated last year
- A novel architectural design for stitching video streams in real-time on an FPGA.☆131Updated 4 years ago
- FPGA和USB3.0桥片实现USB3.0通信☆75Updated 3 years ago
- This repository contains simple implementation of UDP/IP stack with 64-bit AXI-Stream interface. ICMP and ARP requests are partially supp…☆62Updated 3 years ago
- 基于FPGA的图像处理模块(出自于crazybingo)(将部分IP换为纯Verilog用于跨平台移植)☆49Updated 5 years ago
- TFT Clock by Gowin FPGA | 华中科技大学电信学院硬件课设基于国产高云FPGA的多功能TFT屏数字钟☆10Updated 2 years ago
- SPI interface connect to APB BUS with Verilog HDL☆37Updated 4 years ago
- An FPGA-based MPEG2 encoder for video compression (1920x1080 120fps). 基于FPGA的MPEG2视频编码器,可实现视频压缩。☆138Updated last year
- 2023集创赛紫光同创杯一等奖项目☆133Updated last year
- ☆79Updated 3 years ago
- Gigabit Ethernet UDP communication driver☆79Updated 6 years ago
- FPGA 同步FIFO与异步FIFO☆31Updated 6 years ago
- 16QAM modulation and demodulation by Verilog☆20Updated 4 years ago
- Xilinx FPGA, ADC344X, AD9252, 14x 12x Serdes, LVDS☆58Updated 3 years ago
- ISP-Lite, VIP, MIPI-RX IP实现,测试平台为KV260+AR1335 3MP@30fps☆102Updated 2 years ago
- 本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛(高云赛道)项目,题目基于高云FPGA的多路网络视频监控编码系统。☆57Updated last year
- ISP☆13Updated last year
- 这是使用FPGA开发CMOS的两个真实项目,之前的fpga_design仅是一个未完善的版本,同时也删除了一些与项目无关的东西☆36Updated 7 years ago