yupferris / kazeLinks
An HDL embedded in Rust.
☆200Updated last year
Alternatives and similar repositories for kaze
Users that are interested in kaze are comparing it to the libraries listed below
Sorting:
- A hardware compiler based on LLHD and CIRCT☆262Updated 2 months ago
- Low Level Hardware Description — A foundation for building hardware design tools.☆420Updated 3 years ago
- Read and write VCD (Value Change Dump) files in Rust☆44Updated last year
- The LLHD reference simulator.☆39Updated 5 years ago
- Verilator Porcelain☆48Updated last year
- A nicer HDL.☆97Updated 8 years ago
- ☆30Updated 2 years ago
- 🦀 No-nonsense hardware testing/simulation in Rust 🛠️ | Verilog, Spade, Veryl☆62Updated 3 weeks ago
- A simple digital waveform viewer with vi-like key bindings.☆141Updated 6 months ago
- Rust on the Zynq UltraScale+ MPSoC☆42Updated 6 years ago
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Updated 3 years ago
- A Hardware Description Language based on the Rust Programming Language☆235Updated last week
- Fearless hardware design☆179Updated 3 weeks ago
- A framework for writing FPGA firmware using the Rust Programming Language☆409Updated 3 months ago
- Verilog parsing and generator crate.☆21Updated 5 years ago
- wellen: waveform datastructures in Rust. Fast VCD, FST and GHW parsing for waveform viewers.☆84Updated 2 weeks ago
- A template for building Rust applications for HiFive1 boards☆215Updated 2 years ago
- Firmware and software for the Sinara Stabilizer module with high speed, low latency ADC/DAC data processing and powerful DSP algorithms i…☆128Updated 3 months ago
- Verilog generation tool written in Rust☆59Updated 2 years ago
- End-to-end synthesis and P&R toolchain☆87Updated 2 weeks ago
- Minimal runtime / startup for RISC-V CPU's.☆303Updated last year
- A Rust embedded HAL crate for LiteX cores☆31Updated this week
- Logic circuit analysis and optimization☆43Updated 3 weeks ago
- SystemVerilog parser library fully compliant with IEEE 1800-2017☆449Updated 6 months ago
- A dependency management tool for hardware projects.☆320Updated this week
- A Rust crate that allows you to match, bind, and pack the individual bits of integers.☆118Updated 5 years ago
- How to bootstrap support for a no_std target☆214Updated last month
- Veryl: A Modern Hardware Description Language☆785Updated this week
- Register access layer in Rust for all STM32 microcontrollers☆34Updated 3 years ago
- Abstractions common to microcontrollers☆123Updated 3 years ago