Synthesys-Lab / assassynLinks
Asynchronous semantics for architectural simulation and synthesis.
☆39Updated last week
Alternatives and similar repositories for assassyn
Users that are interested in assassyn are comparing it to the libraries listed below
Sorting:
- Virtualized Accelerator Orchestration for Multi-Tenant Workloads☆18Updated 8 months ago
- The Next-gen Language & Compiler Powering Efficient Hardware Design☆29Updated 6 months ago
- ☆17Updated 3 months ago
- Virtuoso is a fast, accurate and versatile simulation framework designed for virtual memory research. Virtuoso uses a new simulation met…☆69Updated 2 months ago
- A flexible, high-performance, user-friendly computer architecture simulator engine☆85Updated this week
- Parendi: Thousand-way Parallel RTL Simulation on the Graphcore IPU☆22Updated last year
- Domain-Specific Architecture Generator 2☆21Updated 2 years ago
- Cluster-level matrix unit integration into GPUs, implemented in Chipyard SoC☆35Updated last month
- Being a full-stack hacker, RISCV, LLVM, and more.☆18Updated 3 years ago
- HeteroCL-MLIR dialect for accelerator design☆41Updated 10 months ago
- ETHZ Heterogeneous Accelerated Compute Cluster.☆36Updated 3 months ago
- ArchExplorer: Microarchitecture Exploration Via Bottleneck Analysis☆32Updated last year
- ☆44Updated 6 months ago
- EQueue Dialect☆40Updated 3 years ago
- Minimal RISC-V Chisel design strictly reflecting the ISA document for verification.☆14Updated last month
- TiledKernel is a code generation library based on macro kernels and memory hierarchy graph data structure.☆19Updated last year
- ☆24Updated 2 weeks ago
- PTX-EMU is a simple emulator for CUDA program.☆34Updated 2 months ago
- A Hardware Pipeline Description Language☆45Updated this week
- Polyhedral High-Level Synthesis in MLIR☆33Updated 2 years ago
- ☆31Updated 3 months ago
- Microarchitecture diagrams of several CPUs☆37Updated last week
- Release of stream-specialization software/hardware stack.☆122Updated 2 years ago
- A retargetable and extensible synthesis-based compiler for modern hardware architectures☆12Updated 2 months ago
- Meta-Repository for Bespoke Silicon Group's Manycore Architecture (A.K.A HammerBlade)☆41Updated last month
- ☆20Updated 5 months ago
- ARIES: An Agile MLIR-Based Compilation Flow for Reconfigurable Devices with AI Engines (FPGA 2025 Best Paper Nominee)☆36Updated this week
- Bridging polyhedral analysis tools to the MLIR framework☆116Updated last year
- Yet another toy CPU.☆91Updated last year
- LLVM OpenCL C compiler suite for ventus GPGPU☆50Updated last week