jensen-yan / kisscpuLinks
国科大一生一芯第二期: RISCV-64 五级流水线CPU
☆17Updated 4 years ago
Alternatives and similar repositories for kisscpu
Users that are interested in kisscpu are comparing it to the libraries listed below
Sorting:
- 中国科学院大学高级计算机体系结构课程作业:使用OpenROAD-flow完成RTL到GDS全流程☆29Updated 5 years ago
- 一生一芯 , ysyx , npc . the repo of the YSYX project . a riscv-64 CPU . writing .☆29Updated 2 years ago
- Open Source Chip Project by University (OSCPU) - Zhoushan Core☆51Updated 2 years ago
- 一生一芯的信息发布和内容网站☆131Updated last year
- This is my graduation project, a simple processor soft core, which implements RV32I ISA.☆17Updated 6 years ago
- MIT6.175 & MIT6.375 Study Notes☆41Updated 2 years ago
- A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, …☆41Updated last year
- 中国科学院大学 计算机组成原理FPGA实验课程 - "Five projects to better understand key principles of computer systems", UCAS Spring 2017 Session☆32Updated 8 years ago
- ☆66Updated 10 months ago
- Introduction to Computer Systems (II), Spring 2021☆51Updated 3 years ago
- ☆34Updated 5 years ago
- 我的一生一芯项目☆16Updated 3 years ago
- ☆38Updated last year
- "aura" my super-scalar O3 cpu core☆24Updated last year
- ☆72Updated 2 months ago
- Highly configurable out-of-order MIPS32 processor, capable of booting Linux.☆39Updated last year
- ☆86Updated last month
- This is a simple Risc-v core for software simulation on FPGA.☆8Updated 3 years ago
- a Quad-issue, Out-of-order Superscalar MIPS Processor Implemented in SystemVerilog☆48Updated last year
- Fuxi (伏羲) is a 32-bit pipelined RISC-V processor written in Chisel3.☆172Updated 3 years ago
- ☆68Updated 2 years ago
- ☆68Updated 4 months ago
- ☆18Updated 2 years ago
- UltraMIPS SoC composed of dual-issue cpu, pipeline Cache and systematic peripheral.☆137Updated last year
- A small SoC with a pipeline 32-bit RISC-V CPU.☆65Updated 3 years ago
- ☆22Updated 2 years ago
- LLCL-MIPS is a superscalar MIPS processor, which supports MIPS Release 1 instructions and is capable of booting linux kernel. (第五届龙芯杯特等奖作…☆36Updated 3 years ago
- ☆36Updated 6 years ago
- RISC-V模拟器,相关硬件实现`riscv-isa-sim`以及模拟器pk, bbl的指导手册☆52Updated 5 years ago
- A softcore microprocessor of MIPS32 architecture.☆40Updated 11 months ago