Alternatives and similar repositories for digital_recognition:

Users that are interested in digital_recognition are comparing it to the libraries listed below

• lucky-wfw / IC_System_Design
  Use Verilog to complete the design of various digital circuits, including common interfaces, such as UART, Bluetooth, IIC, AMBA, etc. It …
  ☆27Updated 4 years ago
• DOUDIU / Hardware-Implementation-of-the-Dark-Channel-Prior-Haze-Removal-Algorithm
  The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to rep…
  ☆32Updated 9 months ago
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆46Updated 4 years ago
• bird1and1fish / Frame_Difference
  FPGA实现动态图像识别
  ☆17Updated 4 years ago
• red435 / verilog_APB_SPI_interface
  SPI interface connect to APB BUS with Verilog HDL
  ☆29Updated 3 years ago
• xiesicong / fpga_eth_dual_ov5640
  fpga读取摄像头数据上传到上位机，720P@60Hz
  ☆19Updated 4 years ago
• flyjancy / CortexM0_SoC_Task
  Step by step tutorial for building CortexM0 SoC
  ☆36Updated 3 years ago
• huanggeli / yolov3tiny-ZYNQ7000
  a Real-time image recognition project with RTL accelerator and ZYNQ Architecture
  ☆54Updated 11 months ago
• iharbour-heyaonan / FPGA_image_process
  FPGA实现简单的图像处理算法
  ☆40Updated 2 years ago
• VenciFreeman / FFT_ChipDesign
  A 16-point radix-4 FFT chip, including Verilog codes, netlists and layout. Group project.
  ☆60Updated 7 months ago
• bunny965 / yolov5-fpga-hardware-acceleration
  网络训练、图像预处理以及部分hend功能是基于pc端实现的，只有主干网络部署在fpga上，片上资源无法支持整个网络所需资源，建议添加外部存储及DDR
  ☆92Updated last year
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆54Updated 8 years ago
• pareddy113 / Design-of-various-multiplier-Array-Booth-Wallace-
  ☆19Updated last year
• C-H-Chien / FPGA_SIFT-LES
  Integration of SIFT and LES Algorithms
  ☆12Updated 10 months ago
• eda-lab / CNNAF-CNN-Accelerator_init
  CNN-Accelerator based on FPGA developed by verilog HDL.
  ☆47Updated 4 years ago
• 2cc2ic / Motion-Detection-System-Based-On-Background-Reconstruction
  This work is based on PYNQ-Z2 development board provided by organizer, and adopts the cooperation scheme of hardware and software to buil…
  ☆42Updated 6 years ago
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆63Updated 5 years ago
• CodeNameGrapefruit / SoC_CNN
  Convolutional Neural Network Implemented in Verilog for System on Chip
  ☆27Updated 5 years ago
• gillianGan / ahb_sram_master
  ☆18Updated 5 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆96Updated 5 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆39Updated 3 years ago
• yztong / LeNet_RTL
  An LeNet RTL implement onto FPGA
  ☆44Updated 6 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆36Updated 8 years ago
• Aperture-Electronic / SystemVerilog-Bitmap-Library-AXI-Image-VIP
  Bitmap Processing Library & AXI-Stream Video Image VIP
  ☆30Updated 2 years ago
• xiesicong / fpga_sobel_ov5640_hdmi
  fpga跑sobel识别算法
  ☆29Updated 4 years ago
• xkw168 / Digital-recognition
  digital recognition base on FPGA
  ☆12Updated 5 years ago
• padhi499 / Image-Classification-using-CNN-on-FPGA
  Project is about designing a Trained Neural Network on FPGA to classify an Image Input using CNN.
  ☆138Updated 4 years ago
• andre1araujo / YOLO-on-PYNQ-Z2
  This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step…
  ☆49Updated 2 weeks ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆40Updated 4 years ago
• BambooWhispering / FPGA-image-simulation
  FPGA图像处理仿真平台
  ☆25Updated 2 years ago