Simple UART controller for FPGA written in VHDL
☆111Aug 7, 2021Updated 5 years ago
Alternatives and similar repositories for uart-for-fpga
Users that are interested in uart-for-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Pipe Mania - Game for FPGA written in VHDL☆12Dec 16, 2018Updated 7 years ago
- A FPGA core for a simple SDRAM controller.☆127Nov 13, 2021Updated 4 years ago
- ☆20Jun 5, 2018Updated 8 years ago
- ☆18Jul 23, 2020Updated 6 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Xilinx Platform cable USB and impact on linux without windrvr by Michael Gernoth☆14Apr 17, 2014Updated 12 years ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 3 years ago
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 7 months ago
- JavaScript action for users to easily install tip/nightly GHDL assets in GitHub Actions workflows☆16Jan 12, 2025Updated last year
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆220Oct 17, 2026Updated last week
- Sketches for DesignLab☆16Sep 10, 2017Updated 9 years ago
- Tcl examples repository designed primarily for use with the latest version of the Libero® SoC Design Suite.☆11Jul 18, 2024Updated 2 years ago
- 💎 A 32-bit ARM Processor Implementation in Verilog HDL☆31Mar 21, 2022Updated 4 years ago
- Direct Digital Synthesis algorithm implementation in VHDL☆12Jan 12, 2022Updated 4 years ago
- Serverless GPU API endpoints on Runpod - Get Bonus Credits • AdSkip the infrastructure headaches. Auto-scaling, pay-as-you-go, no-ops approach lets you focus on innovating your application.
- A VHDL UART for communicating over a serial link with an FPGA☆87Mar 1, 2016Updated 10 years ago
- FOC in FPGA implementation using MATLAB Simulink VDH code generation☆16Jul 3, 2020Updated 6 years ago
- CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations☆22May 4, 2017Updated 9 years ago
- ☆16Aug 7, 2026Updated 2 months ago
- Laser Range Finder Module (Parallax #28044)☆13Jan 5, 2016Updated 10 years ago
- Amiga 600 with Gayle 1: VHDL implementation of PAL16L8B (XU1) with Lattice GAL16V8☆13Jul 31, 2018Updated 8 years ago
- C64 core☆14Jul 25, 2026Updated 3 months ago
- A PYNQ image for a Zynq-7010 FPGA based board☆58Feb 5, 2022Updated 4 years ago
- Digital Electronics course at Brno University of Technology☆146Sep 16, 2026Updated last month
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- ESnet general-purpose FPGA design library.☆14Oct 21, 2026Updated last week
- Apple II+ for MiSTer☆64Oct 14, 2026Updated 2 weeks ago
- Library of VHDL components that are useful in larger designs.☆246Oct 10, 2023Updated 3 years ago
- ☆14Oct 13, 2026Updated 2 weeks ago
- VHDL 1802 Core with TinyBASIC for the Lattice MachXO2 Pico board☆16Dec 23, 2016Updated 9 years ago
- ☆26Feb 8, 2022Updated 4 years ago
- ☆20Jun 19, 2018Updated 8 years ago
- IP cores for the FPGA Libre project☆12Aug 7, 2017Updated 9 years ago
- A VHDL helper that visualizes FSM states and transitions by tracking, in real-time, a specified .vhd file☆15Nov 26, 2018Updated 7 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- 1G eth UDP / IP Stack☆10Jul 17, 2014Updated 12 years ago
- Notes on the Eclypse Z7 development board☆17Apr 9, 2026Updated 6 months ago
- ☆25May 3, 2020Updated 6 years ago
- FPGA design toolkit with templates and standard modules☆28May 31, 2026Updated 4 months ago
- [Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol☆19Feb 22, 2020Updated 6 years ago
- FPGA-Based USB-Input Audio Digital to Analogue Converter☆18Jun 11, 2021Updated 5 years ago
- VHDL code examples for a digital design course☆25Jan 29, 2020Updated 6 years ago