Simple UART controller for FPGA written in VHDL
☆111Aug 7, 2021Updated 5 years ago
Alternatives and similar repositories for uart-for-fpga
Users that are interested in uart-for-fpga are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- SPI master and SPI slave for FPGA written in VHDL☆186Apr 24, 2021Updated 5 years ago
- A simple I2C minion in VHDL☆62Nov 2, 2019Updated 6 years ago
- ☆20Jun 5, 2018Updated 8 years ago
- RMII Firewall FPGA☆25Dec 2, 2019Updated 6 years ago
- Xilinx Platform cable USB and impact on linux without windrvr by Michael Gernoth☆14Apr 17, 2014Updated 12 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- Repository containing the DSP gateware cores☆14Mar 9, 2026Updated 6 months ago
- Used FPGA board and System Verilog to design controller, DMA, pipelined SIMD processor, and GEMM accelerator☆13Aug 26, 2023Updated 3 years ago
- A FPGA core for a simple SDRAM controller.☆126Nov 13, 2021Updated 4 years ago
- Sketches for DesignLab☆16Sep 10, 2017Updated 9 years ago
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆219Jul 27, 2026Updated last month
- An SHA-256 module implementation in VHDL. Based on NIST FIPS 180-4.☆16Sep 24, 2025Updated 11 months ago
- A VHDL UART for communicating over a serial link with an FPGA☆87Mar 1, 2016Updated 10 years ago
- AUTOMATIC VHDL GENERATION FOR CNN MODELS☆32Nov 16, 2022Updated 3 years ago
- SystemC simulator of a highly customizable Nostrum network-on-chip (NoC).☆14Apr 20, 2014Updated 12 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Transfer waveforms from Tektronix Oscilloscopes using the High-Speed Interface☆12Sep 4, 2026Updated 2 weeks ago
- ☆14Jan 22, 2026Updated 7 months ago
- [Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol☆19Feb 22, 2020Updated 6 years ago
- FPGA design toolkit with templates and standard modules☆27May 31, 2026Updated 3 months ago
- C64 core☆14Jul 25, 2026Updated last month
- ESnet general-purpose FPGA design library.☆14Sep 3, 2026Updated 2 weeks ago
- VHDL 1802 Core with TinyBASIC for the Lattice MachXO2 Pico board☆16Dec 23, 2016Updated 9 years ago
- 1G eth UDP / IP Stack☆10Jul 17, 2014Updated 12 years ago
- ☆25May 3, 2020Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- A VHDL helper that visualizes FSM states and transitions by tracking, in real-time, a specified .vhd file☆15Nov 26, 2018Updated 7 years ago
- Simple projects for the RedPitaya board that illustrate the use of standard IPs from Vivado in combination with modules written in Verilo…☆19Aug 4, 2025Updated last year
- Sending UDP packets out over a Gigabit PHY with an FPGA.☆45May 12, 2016Updated 10 years ago
- ☆10Jan 26, 2023Updated 3 years ago
- Library of VHDL components that are useful in larger designs.☆246Oct 10, 2023Updated 2 years ago
- Create database files for the genealogytree LaTeX package from GEDCOM files☆11May 21, 2026Updated 3 months ago
- ☆18Jul 28, 2022Updated 4 years ago
- An interactive digital logic simulator with verilog support (Yosys)☆29Updated this week
- The developed solution for designing an affordable manipulator to be used for teaching proposes where students get to use an FPGA and the…☆11Oct 3, 2023Updated 2 years ago
- GPU virtual machines on DigitalOcean Gradient AI • AdGet to production fast with high-performance AMD and NVIDIA GPUs you can spin up in seconds. The definition of operational simplicity.
- This project is intended to build and deploy an SNPE model on Qualcomm Devices, which are having unsupported layers which are not part of…☆10Oct 4, 2021Updated 4 years ago
- Library for reading Xilinx .bit bitstream file headers with metadata extraction☆14Apr 7, 2026Updated 5 months ago
- Galaksija computer for FPGA☆18Jul 6, 2025Updated last year
- Yocto/OpenEmbedded layer showing example recipe☆18Oct 11, 2018Updated 7 years ago
- ☆14Oct 17, 2023Updated 2 years ago
- Adaptive PI controller based on a reinforcement learning algorithm for speed control of a DC motor☆12Oct 5, 2023Updated 2 years ago
- Supporting hardware, expansions and projects for the rosco_m68k☆17Dec 21, 2023Updated 2 years ago