Alternatives and similar repositories for spi-fpga

Users that are interested in spi-fpga are comparing it to the libraries listed below

• nandland / spi-master
  SPI Master for FPGA - VHDL and Verilog
  ☆296Updated last year
• nandland / spi-slave
  SPI Slave for FPGA in Verilog and VHDL
  ☆201Updated last year
• avakar / usbcorev
  A full-speed device-side USB peripheral core written in Verilog.
  ☆232Updated 2 years ago
• damdoy / ice40_ultraplus_examples
  Examples for iCE40 UltraPlus FPGA: BRAM, SPRAM, SPI, flash, DSP and a working RISC-V implementation
  ☆272Updated last year
• jakubcabal / uart-for-fpga
  Simple UART controller for FPGA written in VHDL
  ☆98Updated 3 years ago
• lekgolo167 / enxor-logic-analyzer
  FPGA Logic Analyzer and GUI
  ☆133Updated 2 years ago
• enjoy-digital / usb3_pipe
  USB3 PIPE interface for Xilinx 7-Series
  ☆217Updated 3 years ago
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆171Updated last week
• ZipCPU / sdspi
  SD-Card controller, using either SPI, SDIO, or eMMC interfaces
  ☆296Updated 2 months ago
• jamieiles / uart
  Verilog UART
  ☆172Updated 12 years ago
• analogdevicesinc / fpgahdl_xilinx
  (RETIRED see https://github.com/analogdevicesinc/hdl instead) FPGA interface reference designs for Analog Devices mixed signal IC product…
  ☆89Updated 6 years ago
• derekmulcahy / xvcpi
  Xilinx Virtual Cable Server for Raspberry Pi
  ☆114Updated 3 years ago
• xesscorp / VHDL_Lib
  Library of VHDL components that are useful in larger designs.
  ☆236Updated last year
• FPGAwars / FPGA-peripherals
  Collection of open-source peripherals in Verilog
  ☆178Updated 3 years ago
• kevinpt / vhdl-extras
  Flexible VHDL library
  ☆187Updated last year
• mczerski / SD-card-controller
  WISHBONE SD Card Controller IP Core
  ☆124Updated 2 years ago
• Xilinx / XilinxVirtualCable
  Xilinx Virtual Cable (XVC) is a TCP/IP-based protocol that acts like a JTAG cable and provides a means to access and debug your FPGA or S…
  ☆247Updated last month
• ultraembedded / core_usb_cdc
  Basic USB-CDC device core (Verilog)
  ☆80Updated 4 years ago
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆242Updated last year
• esynr3z / corsair
  Control and Status Register map generator for HDL projects
  ☆116Updated last month
• Avnet / hdl
  ☆112Updated 3 months ago
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆390Updated this week
• pabennett / uart
  A VHDL UART for communicating over a serial link with an FPGA
  ☆74Updated 9 years ago
• CospanDesign / nysa-sata
  ☆85Updated 8 years ago
• robertofem / CycloneVSoC-examples
  Examples using the Cyclone V SoC chip
  ☆106Updated 6 years ago
• ben-marshall / uart
  A simple implementation of a UART modem in Verilog.
  ☆137Updated 3 years ago
• alexforencich / verilog-dsp
  Verilog digital signal processing components
  ☆143Updated 2 years ago
• www-asics-ws / usb2_dev
  USB 2.0 Device IP Core
  ☆68Updated 7 years ago
• alexforencich / verilog-uart
  Verilog UART
  ☆492Updated 4 months ago
• ultraembedded / core_ft60x_axi
  FTDI FT600 SuperSpeed USB3.0 to AXI bus master
  ☆94Updated 5 years ago