ilyajob05 / verilog_modulesLinks
verilog modules
☆15Updated 5 years ago
Alternatives and similar repositories for verilog_modules
Users that are interested in verilog_modules are comparing it to the libraries listed below
Sorting:
- 6-stage dual-issue in-order superscalar risc-v cpu with floating point unit☆14Updated last week
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆68Updated 5 years ago
- Open-source high performance AXI4-based HyperRAM memory controller☆82Updated 3 years ago
- SPI-Flash XIP Interface (Verilog)☆48Updated 4 years ago
- Verilog module to transmit/receive to/from RGMII compatible ethernet PHY☆31Updated 3 years ago
- A simple DDR3 memory controller☆61Updated 3 years ago
- Two Verilog SPI module implementations (hard and soft) with advanced options and AXI Full Interface☆21Updated 8 years ago
- DDR3 Controller v1.65, 16 read/write ports, configurable widths, priority, auto-burst size & cache on each port. VGA/HDMI multiwindow vi…☆86Updated last year
- Ethernet MAC 10/100 Mbps☆83Updated 6 years ago
- FPGA implementation of a CDR targeting a Xilinx Kintex-7 for data rates up to 250 MHz☆20Updated 4 years ago
- Computational Storage Device based on the open source project OpenSSD.☆30Updated 5 years ago
- RISCV model for Verilator/FPGA targets☆53Updated 6 years ago
- A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)☆34Updated 5 years ago
- It is SATA 3 host controller. Using this you can read write to sata3 sdd/hdd from your fpga logic with simple memory like interface.☆76Updated last year
- UART -> AXI Bridge☆70Updated 4 years ago
- HW JPEG decoder wrapper with AXI-4 DMA☆37Updated 5 years ago
- USB -> AXI Debug Bridge☆42Updated 4 years ago
- Mathematical Functions in Verilog☆97Updated 4 years ago
- Verilog SPI master and slave☆62Updated 10 years ago
- Digital Interpolation Techniques Applied to Digital Signal Processing☆67Updated last year
- USB 2.0 Device IP Core☆74Updated 8 years ago
- ☆30Updated 8 years ago
- IP operations in verilog (simulation and implementation on ice40)☆64Updated 6 years ago
- Basic USB-CDC device core (Verilog)☆86Updated 4 years ago
- A simple Verilog SPI master / slave implementation featuring all 4 modes.☆75Updated 5 years ago
- An FPGA-based HDMI display controller. 基于FPGA的HDMI显示控制器☆93Updated last year
- Extensible FPGA control platform☆61Updated 2 years ago
- ☆82Updated 3 years ago
- I2C controller core☆49Updated 3 years ago
- SDRAM controller for MIPSfpga+ system☆24Updated 5 years ago