Alternatives and similar repositories for my_CortexM3

Users that are interested in my_CortexM3 are comparing it to the libraries listed below

• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆76Updated 4 years ago
• flyjancy / CortexM0_SoC_Task
  Step by step tutorial for building CortexM0 SoC
  ☆39Updated 3 years ago
• Lianghao-Yuan / AHB_Bus_Matrix
  ☆38Updated 10 years ago
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆61Updated 9 years ago
• Frogwells / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆96Updated 8 years ago
• cjhonlyone / picorv32_Xilinx
  A picorv32-riscv Soc with DMAC and Ethernet controller & lwip & Kirtex7@333MHz
  ☆78Updated 4 years ago
• suisuisi / FPGATechnologyGroup
  FPGA Technology Exchange Group相关文件管理
  ☆67Updated last month
• Nitcloud / Image_sim
  基于FPGA的图像处理模块（出自于crazybingo）（将部分IP换为纯Verilog用于跨平台移植）
  ☆51Updated 5 years ago
• BigPig-Bro / udp_gmii_ov5640
  本项目为2023年全国大学生嵌入式芯片与系统设计竞赛——FPGA创新设计竞赛（高云赛道）项目，题目基于高云FPGA的多路网络视频监控编码系统。
  ☆62Updated 2 years ago
• xiaoerlang0359 / E203plus
  upgrade to e203 (a risc-v core)
  ☆45Updated 5 years ago
• BitOpenFPGA / arl
  lists of most popular repositories for most favoured programming languages (according to StackOverflow)
  ☆81Updated 5 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆213Updated 2 years ago
• Starrynightzyq / Nexys4DDR-ARM-M3-Plate-Recognition
  车牌识别,FPGA,2019全国大学生集成电路创新创业大赛
  ☆147Updated 6 years ago
• WayneGong / Image_Rotate
  视频旋转（2019FPGA大赛）
  ☆38Updated 5 years ago
• kdurant / axi-ddr3
  学习AXI接口，以及xilinx DDR3 IP使用
  ☆40Updated 8 years ago
• twomonkeyclub / UART
  ARM中通过APB总线连接的UART模块
  ☆71Updated 5 years ago
• panicmarvin / cmsdk_ahb_busmatrix
  practice configure AHB-Lite bus protocol
  ☆19Updated 6 years ago
• wudayemen / gen_apb_file
  ☆75Updated 4 years ago
• KasuganoSoraaa / simple-AXI2AHB-bridge
  AXI master to AHB slave, support INCR/WRAP, out of standing, do not advanced feature such as support out of order, retry, split, etc
  ☆42Updated 3 years ago
• zhangzek / Clock-Domain-Crossing-Design
  Clock Domain Crossing Design（use MCP formulation without feedback）基于MCP不带反馈的跨时钟域设计
  ☆12Updated 6 years ago
• wbbbbbb123 / Sram-controller-design-based-on-AHB-bus
  ☆20Updated 3 years ago
• csus-senior-design / i2c
  I2C Master and Slave
  ☆38Updated 10 years ago
• ForrestBlue / cortexm0ds
  ☆74Updated 10 years ago
• suisuisi / FPGA
  FPGA
  ☆129Updated 5 years ago
• feifan1996 / RiscSoC
  RiscSoC 是一个芯片集成项目，包含了 Cortex-M0、Cortex-M3、MIPS、RISC-V、4-BIT 等内核的 SoC 集成，部分 SoC 使用的自己设计的内核
  ☆12Updated 3 years ago
• suisuisi / basic_systemverilog
  Must-have verilog systemverilog modules
  ☆37Updated 3 years ago
• verimake-team / SparkRoad-V
  ☆64Updated last year
• Frogwells / fpga_cmos_design
  这是使用FPGA开发CMOS的两个真实项目，之前的fpga_design仅是一个未完善的版本，同时也删除了一些与项目无关的东西
  ☆36Updated 8 years ago
• microdynamics-cpu / tree-core-ide
  The next generation integrated development environment for processor design and verification. It has multi-hardware language support, o…
  ☆113Updated 3 years ago
• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆234Updated last year