The project includes codes, specification, presentation and other information.
☆27Feb 2, 2026Updated 6 months ago
Alternatives and similar repositories for Intelligent-BLDC-driver
Users that are interested in Intelligent-BLDC-driver are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Step by step tutorial for building CortexM0 SoC☆41Mar 29, 2022Updated 4 years ago
- This is just for Takk_Zynq_Labs test.☆27Jan 14, 2022Updated 4 years ago
- Windows Research Kernel☆14Apr 1, 2016Updated 10 years ago
- A custom coprocessor and SoC for hardware security experiments in electronics.☆12May 20, 2017Updated 9 years ago
- ☆14Aug 23, 2023Updated 2 years ago
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- FIR,FFT based on Verilog☆14Dec 3, 2017Updated 8 years ago
- 磁场矢量控制云台电机程序,使用MT6813获取位置角度,使用uart串口实现modbus RTU通讯,电流环16K,速度环8K,位置环4K,STM32F103C8T6主控,开发环境keil☆12Sep 10, 2024Updated last year
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago
- The PE for the second generation CGRA (garnet).☆18Feb 22, 2026Updated 5 months ago
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆13Jan 15, 2022Updated 4 years ago
- 使用C语言结合单片机一步一步实现FOC算法控制BLDC电机 Implementing FOC algorithm step by step to control BLDC motor using C language combined with microcontroll…☆28Feb 20, 2024Updated 2 years ago
- ☆13May 21, 2019Updated 7 years ago
- FPGA based, Real-time processing of audio, including voiceprint recognition, adaptive noise suppression, et al.☆17May 8, 2025Updated last year
- 基于Verilog实现的串口发送程序,带奇偶校验位。☆12Aug 23, 2019Updated 6 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- Documentation for the entire CGRAFlow☆19Sep 17, 2021Updated 4 years ago
- Ubuntu 10.04 kernel 2.6.32-kdev☆17Apr 24, 2025Updated last year
- Digital Design Lab Spring 2019 Final Project☆13Jun 17, 2019Updated 7 years ago
- 单向逆变器并联,并网设计☆20Jul 10, 2024Updated 2 years ago
- An accurate Electro Cardio Graph system, with peak detection and counting mechanism programmed in Verilog.☆15Jan 6, 2019Updated 7 years ago
- Project and presentation for SpaceX Application☆14Jul 21, 2017Updated 9 years ago
- ☆14Oct 8, 2016Updated 9 years ago
- 2023年电赛A题sogi鉴相加pll锁相dq解耦电流环控制☆16Sep 8, 2023Updated 2 years ago
- A 66-order (67 taps) hamming FIR LPF Filter is to be designed with a cutoff frequency of 200 KHZ for a sampling frequency of 1 MHZ☆15Feb 17, 2023Updated 3 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- The 3rd Iteration of the Berkeley RISC-V DMA Accelerator☆28Nov 21, 2019Updated 6 years ago
- 基于FPGA的PCIe 板卡,支持 离散量输入输出、ARINC429协议☆18Dec 1, 2022Updated 3 years ago
- Arrhythmia Detection Using Algorithm and Hardware Co-design for Neural Network Inference Accelerators☆16Jun 5, 2023Updated 3 years ago
- 文档编写☆14Sep 19, 2020Updated 5 years ago
- Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.☆13May 5, 2015Updated 11 years ago
- ☆38Jun 3, 2024Updated 2 years ago
- ☆18Aug 24, 2023Updated 2 years ago
- I2C Slave☆14Jul 17, 2014Updated 12 years ago
- asynchronous fifo based on verilog☆16Apr 14, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆22Oct 29, 2025Updated 9 months ago
- This project records the process of optimizing SGEMM (single-precision floating point General Matrix Multiplication) on the riscv platfor…☆24Dec 11, 2024Updated last year
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器,为低端FPGA嵌入式系统提供廉价、大容量的存储。☆221Sep 15, 2023Updated 2 years ago
- A 1D Convolutional Neural Network I trained to detect 5 types of arrhythmia in heartbeats taken from the MIT/BIH Arrhythmia Database☆16Oct 10, 2017Updated 8 years ago
- 无刷直流电机方波驱动程序,stm32f4驱动两个无刷电机☆17Dec 16, 2017Updated 8 years ago
- 四轴飞行器飞控算法☆23Aug 26, 2019Updated 6 years ago
- Supports ABZ Hall IIC encoders, using the standard hal library.☆16Jun 16, 2025Updated last year