The project includes codes, specification, presentation and other information.
☆27Feb 2, 2026Updated 4 months ago
Alternatives and similar repositories for Intelligent-BLDC-driver
Users that are interested in Intelligent-BLDC-driver are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Step by step tutorial for building CortexM0 SoC☆40Mar 29, 2022Updated 4 years ago
- 【2022集创赛】Arm杯一等奖作品：Cortex-M0智能娱乐收音机 开源项目☆28Mar 21, 2023Updated 3 years ago
- This is just for Takk_Zynq_Labs test.☆27Jan 14, 2022Updated 4 years ago
- A custom coprocessor and SoC for hardware security experiments in electronics.☆12May 20, 2017Updated 9 years ago
- ☆14Aug 23, 2023Updated 2 years ago
- Virtual machines for every use case on DigitalOcean • AdGet dependable uptime with 99.99% SLA, simple security tools, and predictable monthly pricing with DigitalOcean's virtual machines, called Droplets.
- 适用于FPGA——利用串口通信接收幅度频率信息数据帧，控制DA输出相应正弦信号☆10Jul 10, 2019Updated 6 years ago
- 基于Verilog实现的串口发送程序，带奇偶校验位。☆12Aug 23, 2019Updated 6 years ago
- 第四届全国大学生嵌入式比赛SoC☆12Apr 1, 2022Updated 4 years ago
- Verilog RS232 Enhanced Synch-UART & RS232 Debugger HDL core with PC host RS232 real-time Hex-editor / viewer host utility.☆12Jan 15, 2022Updated 4 years ago
- The PE for the second generation CGRA (garnet).☆18Feb 22, 2026Updated 3 months ago
- 2023年全国大学生集成电路创新创业大赛-海运捷讯杯-全国二等奖作品 FPGA-Based SSD-MobileNet Acceleator; CNN Acceleator; China IC Competition☆23Dec 2, 2024Updated last year
- 磁场矢量控制云台电机程序，使用MT6813获取位置角度，使用uart串口实现modbus RTU通讯，电流环16K，速度环8K，位置环4K，STM32F103C8T6主控，开发环境keil☆12Sep 10, 2024Updated last year
- Documentation for the entire CGRAFlow☆19Sep 17, 2021Updated 4 years ago
- 第八届集创赛紫光同创杯音频处理国家二等奖☆26Oct 15, 2024Updated last year
- Wordpress hosting with auto-scaling - Free Trial Offer • AdFully Managed hosting for WordPress and WooCommerce businesses that need reliable, auto-scalable performance. Cloudways SafeUpdates now available.
- 单向逆变器并联，并网设计☆20Jul 10, 2024Updated last year
- Digital Design Lab Spring 2019 Final Project☆13Jun 17, 2019Updated 6 years ago
- 基于FPGA的PCIe 板卡，支持 离散量输入输出、ARINC429协议☆18Dec 1, 2022Updated 3 years ago
- Supports ABZ Hall IIC encoders, using the standard hal library.☆16Jun 16, 2025Updated 11 months ago
- Project and presentation for SpaceX Application☆14Jul 21, 2017Updated 8 years ago
- 2023年电赛A题sogi鉴相加pll锁相dq解耦电流环控制☆15Sep 8, 2023Updated 2 years ago
- A 66-order (67 taps) hamming FIR LPF Filter is to be designed with a cutoff frequency of 200 KHZ for a sampling frequency of 1 MHZ☆15Feb 17, 2023Updated 3 years ago
- An accurate Electro Cardio Graph system, with peak detection and counting mechanism programmed in Verilog.☆15Jan 6, 2019Updated 7 years ago
- ☆18Aug 24, 2023Updated 2 years ago
- Managed hosting for WordPress and PHP on Cloudways • AdManaged hosting for WordPress, Magento, Laravel, or PHP apps, on multiple cloud providers. Deploy in minutes on Cloudways by DigitalOcean.
- embARC BSP for DesignWare® ARC® EM Starter Kit (EMSK)☆14Nov 12, 2019Updated 6 years ago
- Verilog UART FIFO that will just echo back characters. Useful for testing the communications path.☆13May 5, 2015Updated 11 years ago
- Template Verilator project for beginners☆13Feb 2, 2023Updated 3 years ago
- I2C Slave☆14Jul 17, 2014Updated 11 years ago
- CS533 Course Project (ongoing) - Exploring Parallel Architectures for Neural Processing Unit Implementations☆22May 4, 2017Updated 9 years ago
- 无刷直流电机方波驱动程序，stm32f4驱动两个无刷电机☆17Dec 16, 2017Updated 8 years ago
- An FPGA-based DDR1 controller. 基于FPGA的DDR1控制器，为低端FPGA嵌入式系统提供廉价、大容量的存储。☆216Sep 15, 2023Updated 2 years ago
- MIDI电子乐器，ESP32、MicroPython☆10Jun 27, 2021Updated 4 years ago
- 电池管理系统☆16Jan 13, 2020Updated 6 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- 文档编写☆14Sep 19, 2020Updated 5 years ago
- CPU + xv6 + compiler☆18Feb 7, 2018Updated 8 years ago
- 为了学习UVM验证相关知识，需要动手尝试实际的项目。作为一个初学者，难以接触到实际的项目，于是我从夏宇闻老师的《Verilog数字系统设计教程》一书中，挑选出一个简单的小设计，作为我的验证对象，并围绕它编写了UVM验证环境。☆25Oct 9, 2020Updated 5 years ago
- Template-based Reconfigurable Architecture Modeling Framework☆14Aug 16, 2022Updated 3 years ago
- ☆21Oct 29, 2025Updated 7 months ago
- HDL & FPGA 学习和规范。CC-BY-NC-SA 4.0。☆16Jun 9, 2023Updated 3 years ago
- XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA☆22Mar 7, 2024Updated 2 years ago