Alternatives and similar repositories for PCIe_Scrambler

Users that are interested in PCIe_Scrambler are comparing it to the libraries listed below

• kirbyydoge / kasirga_gok_2023
  Kasırga - Gök Sayısal İşlemci Kategorisi RISC-V İşlemci Tasarımı
  ☆17Updated 2 years ago
• eminfedar / fedar-f1-rv64im
  5-Stage Pipelined RV64IM RISC-V CPU design in Verilog.
  ☆211Updated 4 years ago
• TUTEL-TUBITAK / TEKNOFEST_2023_Cip_Tasarim_Yarismasi
  Bu depo TEKNOFEST 2023 Çip Tasarım Yarışması'nda Analog Tasarım ve Sayısal İşlemci Tasarımı kategorilerinde çeşitli dosyaları paylaşmak i…
  ☆20Updated 2 years ago
• necaticakaci / matrak
  Matrak Verilog ile yazılmış bir RISC-V işlemcidir.
  ☆11Updated last year
• yusfux / KASIRGA-GUN
  KASIRGA-GUN | RV32IMCX
  ☆11Updated last year
• kirbyydoge / kasirga_2023
  Kasırga Sayısal Görüntü İşleme Kategorisi Hızlandırıcı Tasarımı
  ☆13Updated 2 years ago
• semiDESIgner / 50daysRTLcode
  ☆17Updated 2 years ago
• koraykarakurt / FPGA-from-Zero-to-Hero
  Repository of FPGA from Zero to Hero - Live and Free FPGA/SoC Lectures on YouTube (www.youtube.com/@falsepaths)
  ☆36Updated 3 months ago
• fayizferosh / yosys-tcl-ui-report
  5 Day TCL begginer to advanced training workshop by VSD
  ☆18Updated 2 years ago
• mbaykenar / computer-architecture
  This course is given in ERCIYES UNIVERSITY for Spring 2022-2023 semester as a fourth grade lecture. You can find lecture notes, RISC-V as…
  ☆17Updated 2 years ago
• rajdeep66 / edaBundle_whyRD
  opensource EDA tool flor VLSI design
  ☆35Updated 2 years ago
• mbaykenar / apis_anatolia
  "Mehmet Burak Aykenar" YouTube kanalında yayınlanan VHDL ve FPGA dersleri ile ilgili kodları içermektedir.
  ☆109Updated last year
• muhammedkocaoglu / mystic_riscv64
  64-bit RISC-V processor
  ☆16Updated 2 years ago
• Ummidichandrika / 100-Days-of-RTL
  ☆117Updated last year
• yathAg / openroad_vsd_7nmContest
  ☆15Updated 2 years ago
• eminfedar / fedar-e1-rv32i
  5-Stage Pipelined RV32I RISC-V Core design in Verilog-2005. It has 32 GPIO pins and it is FPGA synthesible.
  ☆23Updated 2 years ago
• mbaykenar / mpw7_yonga_soc
  Yonga-MCU is a 32-bit RISCV-IMC instruction set compatible SoC design with peripherals like UART, SPI and I2C
  ☆18Updated 2 years ago
• OrsuVenkataKrishnaiah1235 / RTL-Coding
  "Mastering Verilog Programming for Digital Circuit Design: RTL and TestBench Codes Practice with HDL-BITS"
  ☆14Updated 2 years ago
• kerimturak / tcore-rv32imc
  ☆13Updated last week
• fayizferosh / soc-design-and-planning-nasscom-vsd
  2 Week digital VLSI SoC design and planning workshop with complete RTL2GDSII flow organised by VSD in collaboration with NASSCOM (Advance…
  ☆28Updated last year
• hughbyrne10 / 100daysofRTL
  100 Days Of RTL is a personal challenge designed to help improve skills and knowledge in digital circuit design. The challenge involves c…
  ☆27Updated 2 years ago
• ARC-Lab-UF / sv-tutorial
  SystemVerilog Tutorial
  ☆178Updated last week
• Artityagi123456789 / 100DaysofRTL
  ☆17Updated last year
• chinthacharan / DV-Interview-Prep-Guide
  Design Verification Engineer interview preparation guide.
  ☆38Updated 3 months ago
• Nirvan007 / Analog_Electronics
  This repository is dedicated to exploring the practical aspects of analog electronic circuits and Analog VLSI design. It contains a colle…
  ☆25Updated last year
• raulbehl / 100DaysOfRTL
  100 Days of RTL
  ☆401Updated last year
• vinayrayapati / iiitb_rv32i
  ☆14Updated 3 years ago
• ChinnuReddySeelam / 100DaysRTL_Part1_HDL
  ☆10Updated 2 years ago
• cepdnaclk / e16-co502-RV32IM-pipeline-implementation-group1
  The objective of this project was to design and implement a 5 stage pipeline CPU to support the RISC-V instruction architecture. This pip…
  ☆26Updated 4 years ago
• muhammedkocaoglu / SystemVerilog-Tutorials
  SystemVerilog derslerinde yazdığım kodları içermektedir.
  ☆15Updated last year