Alternatives and similar repositories for SMTAttack

Users that are interested in SMTAttack are comparing it to the libraries listed below

• openhwgroup / cva6-sdk
  CVA6 SDK containing RISC-V tools and Buildroot
  ☆66Updated 11 months ago
• isec-tugraz / coco-alma
  CocoAlma is an execution-aware tool for formal verification of masked implementations
  ☆22Updated 8 months ago
• RPTU-EIS / upec-boom-verification-suite
  This repository contains the verification suite for verifying Berkeley Out-of-Order Machine (BOOM) against transient execution attacks ba…
  ☆17Updated 2 years ago
• mit-ll / CEP
  The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freel…
  ☆65Updated 2 years ago
• proteus-core / proteus
  The SpinalHDL design of the Proteus core, an extensible RISC-V core.
  ☆53Updated last month
• YosysHQ / eqy
  Equivalence checking with Yosys
  ☆43Updated last month
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆64Updated 5 years ago
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆33Updated 3 years ago
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆94Updated 2 months ago
• antmicro / rowhammer-tester
  ☆62Updated 3 weeks ago
• pulp-platform / culsans
  Tightly-coupled cache coherence unit for CVA6 using the ACE protocol
  ☆32Updated last year
• PrincetonUniversity / AutoSVA
  AutoSVA is a tool to automatically generate formal testbenches for unit-level RTL verification. The goal is to, based on annotations made…
  ☆83Updated last year
• ucb-bar / sha3
  ☆81Updated last year
• DfX-NYUAD / PSAT
  This is a probabilistic SAT attack tool.
  ☆14Updated 4 years ago
• hackdac / hackdac_2018_beta
  The SoC used for the beta phase of Hack@DAC 2018.
  ☆17Updated 5 years ago
• tdb-alcorn / chisel-formal
  ☆23Updated 4 years ago
• comsec-group / mucfi
  Microarchitectural control flow integrity (𝜇CFI) verification checks whether there exists a control or data flow from instruction's ope…
  ☆13Updated 3 months ago
• YosysHQ / riscv-formal
  RISC-V Formal Verification Framework
  ☆139Updated this week
• chipsalliance / uvm-verilator
  ☆95Updated last year
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆37Updated last year
• ymherklotz / verismith
  Verilog Fuzzer to test the major simulators and sythesisers by generating random, valid Verilog.
  ☆104Updated 3 weeks ago
• yaozhaosh / chisel-aes
  Chisel implementation of AES
  ☆23Updated 5 years ago
• ekiwi / open-source-formal-verification-for-chisel
  ☆11Updated 3 years ago
• ekiwi / simulator-independent-coverage
  Project Repo for the Simulator Independent Coverage Research
  ☆19Updated 2 years ago
• openhwgroup / cva6-platform
  CVA6-platform is a multicore CVA6 with CV-MESH software and regression platform
  ☆11Updated last year
• chipsalliance / espresso
  ☆39Updated last year
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆67Updated 2 months ago
• CTSRD-CHERI / Test-Suite-Transient-Execution
  Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly
  ☆15Updated 3 years ago
• gipsyh / rIC3
  Hardware Formal Verification Tool
  ☆52Updated this week
• ics-jku / epex-formal-rv32-model
  A RISC-V RV32 model ready for SMT program synthesis.
  ☆11Updated 3 years ago