Alternatives and similar repositories for rfuzz

Users that are interested in rfuzz are comparing it to the libraries listed below

• rzhang2285 / Coppelia
  Code repository for Coppelia tool
  ☆23Updated 4 years ago
• compsec-snu / difuzz-rtl
  ☆93Updated last year
• googleinterns / hw-fuzzing
  ☆86Updated 2 years ago
• ekiwi / simulator-independent-coverage
  Project Repo for the Simulator Independent Coverage Research
  ☆20Updated 2 years ago
• comsec-group / cellift-meta
  All the tools you need to reproduce the CellIFT paper experiments
  ☆21Updated 6 months ago
• ekiwi / rtl-fuzz-lab
  A Modular Open-Source Hardware Fuzzing Framework
  ☆34Updated 3 years ago
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆64Updated 5 years ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆69Updated 5 months ago
• hackdac / hackdac_2018_beta
  The SoC used for the beta phase of Hack@DAC 2018.
  ☆17Updated 5 years ago
• compsec-snu / specdoctor
  ☆25Updated 2 years ago
• draperlaboratory / hope-RIPE
  A port of the RIPE suite to RISC-V.
  ☆29Updated 6 years ago
• gipsyh / rIC3
  Hardware Formal Verification Tool
  ☆62Updated this week
• CTSRD-CHERI / Test-Suite-Transient-Execution
  Test suite containing a reproduction of all major transient-execution attacks in RISC-V and CHERI-RISC-V assembly
  ☆16Updated 4 years ago
• comparch-security / cache-model
  A behavioural cache model for analysing the cache behaviour under side-channel attack.
  ☆26Updated last month
• dian-lun-lin / GenFuzz
  GPU-enabled Hardware Fuzzer using Genetic Algorithm
  ☆17Updated 2 years ago
• skmuduli92 / HyperFuzzer
  ☆16Updated 4 years ago
• comsec-group / cascade-artifacts
  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
  ☆131Updated 11 months ago
• mjyan0720 / InvisiSpec-1.0
  Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.
  ☆60Updated 5 years ago
• efeslab / hardware-bugbase
  ☆18Updated last year
• PrincetonUniversity / ILAng
  A Modeling and Verification Platform for SoCs using ILAs
  ☆77Updated last year
• cwfletcher / stt
  ☆35Updated 4 years ago
• ccelio / Speckle
  A wrapper for the SPEC CPU2006 benchmark suite.
  ☆88Updated 4 years ago
• comparch-security / cpu-sec-bench
  Security Test Benchmark for Computer Architectures
  ☆21Updated 6 months ago
• diffblue / hw-cbmc
  The HW-CBMC and EBMC Model Checkers for Verilog
  ☆81Updated this week
• cwfletcher / oisa
  Data oblivious ISA prototyped on the RISC-V BOOM processor.
  ☆22Updated 3 years ago
• ics-jku / spinalfuzz
  Fuzzing for SpinalHDL
  ☆16Updated 2 years ago
• riscv / riscv-cfi
  This specification is integrated into the Priv. and Unpriv. specifications. This repo is no longer maintained. Please refer to the Priv. …
  ☆92Updated 3 weeks ago
• sycuricon / MorFuzz
  Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation
  ☆30Updated 4 months ago
• embecosm / mibench
  The MiBench testsuite, extended for use in general embedded environments
  ☆101Updated 12 years ago
• HWSec-UNC / Sylvia
  ☆18Updated 2 months ago