☆17Aug 16, 2023Updated 2 years ago
Alternatives and similar repositories for meowality
Users that are interested in meowality are comparing it to the libraries listed below
Sorting:
- A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad☆14Jan 15, 2024Updated 2 years ago
- SPIFlashProgrammer is a small and fast SPI Flash programming tool that's designed to be easy to use☆15May 15, 2023Updated 2 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆37Feb 16, 2026Updated 2 weeks ago
- Hot Reconfiguration Technology demo☆42Aug 23, 2022Updated 3 years ago
- Documenting Lattice's 28nm FPGA parts☆148Updated this week
- DDR3 controller for nMigen (WIP)☆14Dec 25, 2023Updated 2 years ago
- PLEASE MOVE TO PAWSv2☆16Feb 2, 2022Updated 4 years ago
- SNES for MiSTer☆16Sep 5, 2025Updated 5 months ago
- Analog and power building blocks for sky130 pdk☆22Mar 3, 2021Updated 4 years ago
- CRUVI Standard Specifications☆21May 6, 2024Updated last year
- Bit streams forthe Ulx3s ECP5 device☆18Apr 9, 2023Updated 2 years ago
- HDL development environment on Nix.☆26Oct 23, 2024Updated last year
- Siglent SDS1x0xX-E FPGA bitstreams☆46Dec 24, 2024Updated last year
- Yosys plugin for logic locking and supply-chain security☆23Apr 5, 2025Updated 10 months ago
- Open source MPSoC running 620 MIPS (CHStone) of RISC-V (RV32iMC) programms on the ARTY board (XC7A35T).☆22Dec 20, 2019Updated 6 years ago
- ☆59Jul 4, 2022Updated 3 years ago
- ☆26Sep 3, 2025Updated 5 months ago
- ☆27Jan 16, 2022Updated 4 years ago
- ULX3S Quick Start☆23Oct 8, 2020Updated 5 years ago
- ☆22Sep 27, 2022Updated 3 years ago
- Translates GDSII into HTML/JS that can be viewed in WebGL-capable web browsers.☆59Aug 23, 2020Updated 5 years ago
- Create fast and efficient standard cell based adders, multipliers and multiply-adders.☆120Sep 20, 2023Updated 2 years ago
- IP submodules, formatted for easier CI integration☆31Sep 22, 2025Updated 5 months ago
- Characterizer☆31Nov 19, 2025Updated 3 months ago
- Various examples for Chisel HDL☆30Mar 20, 2022Updated 3 years ago
- FPGA CryptoNight V7 Minner☆31Aug 26, 2019Updated 6 years ago
- TF Lite demo on LiteX/VexRiscv soft RISC-V SoC on a Digilent Arty board☆70Jul 5, 2022Updated 3 years ago
- iCE40 FPGA, SPI flash, and CMSIS-DAP SWD programmer☆70Jan 25, 2021Updated 5 years ago
- SoC based on SERV, Olof Kindgren's bit-serial RISC-V processor. Provides Execute in Place (XiP) from Flash.☆31Sep 10, 2020Updated 5 years ago
- A lightweight CoAP message manipulation crate, ideal for embedded environments☆36May 10, 2025Updated 9 months ago
- Yet Another VHDL tool☆30May 15, 2017Updated 8 years ago
- FPGA Odysseus with ULX3S☆69Nov 1, 2023Updated 2 years ago
- A robust, open-source physical layer implementation for FPGA-to-FPGA communication over high-speed serial links of the Quantum Error Corr…☆28Updated this week
- SD card reader with STM32F1☆11Nov 10, 2018Updated 7 years ago
- ☆10Oct 23, 2016Updated 9 years ago
- Kinematic and dynamic models of continuum and articulated soft robots.☆15Nov 22, 2025Updated 3 months ago
- Open-source RHBD (Radiation Hardened by Design) Standard-Cell Library for SKY130☆13Feb 19, 2026Updated last week
- Music Player with a familiar look! Ladies and Gentlemen, it's Winamp, for Android! [Disclaimer: This is not WInamp. All trademarks are c…☆15Aug 25, 2025Updated 6 months ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆34Sep 19, 2018Updated 7 years ago