gatecat / meowality
☆15Updated last year
Alternatives and similar repositories for meowality:
Users that are interested in meowality are comparing it to the libraries listed below
- My pergola FPGA projects☆30Updated 3 years ago
- Utilities for the ECP5 FPGA☆18Updated 3 years ago
- A configurable USB 2.0 device core☆30Updated 4 years ago
- CRUVI Standard Specifications☆17Updated 8 months ago
- 妖刀夢渡☆59Updated 5 years ago
- Development board for Lattice Crosslink-NX 72QFN☆28Updated 4 years ago
- SD device emulator from ProjectVault☆15Updated 5 years ago
- Yet Another Debug Transport☆20Updated 2 years ago
- Misc open FPGA flow examples☆8Updated 5 years ago
- Small footprint and configurable Inter-Chip communication cores☆54Updated last week
- This repository contains iCEBreaker examples for Amaranth HDL.☆38Updated last year
- verilog core for ws2812 leds☆32Updated 3 years ago
- System on Chip toolkit for nMigen☆19Updated 4 years ago
- Small footprint and configurable HyperBus core☆10Updated 2 years ago
- A reconfigurable logic circuit made of identical rotatable tiles.☆20Updated 3 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆12Updated 6 years ago
- Finding the bacteria in rotting FPGA designs.☆13Updated 4 years ago
- Siglent SDS1x0xX-E FPGA bitstreams☆40Updated 3 weeks ago
- iCE40 floorplan viewer☆24Updated 6 years ago
- Experiments with Yosys cxxrtl backend☆47Updated this week
- ☆63Updated 4 years ago
- LiteX project for the ButterStick bootloader☆13Updated last year
- A LiteX module implementing a USB UAC2 module with simple PDM in/out☆14Updated 2 years ago
- Simplified environment for litex☆14Updated 4 years ago
- a noodly Amaranth HDL-wrapper for FPGA SerDes' presenting a PIPE PHY interface☆32Updated 3 years ago
- ☆12Updated 3 years ago
- Wishbone bridge over SPI☆11Updated 5 years ago
- An experiment for building gateware for the axiom micro / beta using amaranth-hdl☆40Updated 8 months ago
- ☆43Updated 9 months ago
- RISC-V Processor written in Amaranth HDL☆35Updated 2 years ago