benpye / nix-fpga-toolsLinks
☆27Updated 3 years ago
Alternatives and similar repositories for nix-fpga-tools
Users that are interested in nix-fpga-tools are comparing it to the libraries listed below
Sorting:
- HDL development environment on Nix.☆26Updated last year
- Haskell library for hardware description☆104Updated 3 months ago
- 32-bit RISC-V Emulator☆26Updated 6 years ago
- Yosys plugin for synthesis of Bluespec code☆15Updated 4 years ago
- A Verilog parser for Haskell.☆36Updated 4 years ago
- A replacement for gtkwave, written in Rust with high-performance and larger-than-memory traces in mind.☆19Updated 3 years ago
- ☆14Updated last year
- ☆30Updated 4 years ago
- An FPGA reverse engineering and documentation project☆61Updated this week
- Generate interface between Clash and Verilator☆22Updated last year
- Hot Reconfiguration Technology demo☆41Updated 3 years ago
- Industry standard I/O for Amaranth HDL☆30Updated last year
- Fiber-based SystemVerilog Simulator.☆25Updated 3 years ago
- ABC: System for Sequential Logic Synthesis and Formal Verification☆30Updated last week
- End-to-end synthesis and P&R toolchain☆92Updated 2 months ago
- Whisk: 16-bit serial processor for TT02☆13Updated last year
- WebAssembly-based Yosys distribution for Amaranth HDL☆28Updated 2 weeks ago
- Nix channel with FPGA development tools☆13Updated 4 years ago
- NixOS on Allwinner D1 RISC-V☆39Updated 3 years ago
- NixOS on Xilinx Zynq and ZynqMP☆42Updated 2 weeks ago
- CPOL=0, CPHA=0 SPI core for practicing formal verification with yosys☆21Updated 5 years ago
- Nix Expressions for Altera(Intel) Quartus☆16Updated 5 years ago
- Experiments with Yosys cxxrtl backend☆50Updated 10 months ago
- A Yosys pass and technology library + scripts for implementing a HDL design in discretie FETs for layout in KiCad☆13Updated last year
- Playground for experimenting with and sharing short Amaranth programs on the web☆20Updated last month
- converts catgirls to gds files☆15Updated 4 years ago
- RFCs for changes to the Amaranth language and standard components☆18Updated last month
- System on Chip toolkit for Amaranth HDL☆97Updated last year
- A RiscV processor implementing the RV32I instruction set written in Clash☆55Updated 7 years ago
- Finding the bacteria in rotting FPGA designs.☆14Updated 4 years ago