A VHDL implementation of SipHash
☆13Feb 19, 2015Updated 11 years ago
Alternatives and similar repositories for siphash
Users that are interested in siphash are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Hardware implementation of the SipHash short-inout PRF☆18Apr 3, 2025Updated last year
- SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).☆12Oct 14, 2017Updated 8 years ago
- A clean & simple implementation of BLAKE2b and BLAKE2s hash functions -- written while writing the RFC.☆21Nov 3, 2015Updated 10 years ago
- Simple tool to regularly pool Tor HSDirs for hidden service descriptors☆10Jul 3, 2015Updated 11 years ago
- Arxiv crawler written in python☆13Jun 17, 2012Updated 14 years ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- Hardware-accelerated sorting algorithm☆16May 4, 2020Updated 6 years ago
- Framework for building transparent memory encryption and authentication solutions☆27Jun 19, 2018Updated 8 years ago
- ☆17Sep 4, 2014Updated 11 years ago
- Lightweight Symbolic Execution Engine☆23Jul 1, 2015Updated 11 years ago
- an authenticated, chunked cipher based on BLAKE3☆23Jun 21, 2026Updated last month
- A cryptographic hash function faster than MD5, SHA-1, SHA-2, and SHA-3☆14Feb 14, 2022Updated 4 years ago
- Gentoo overlay for Tox clients and Tox related projects☆20May 23, 2016Updated 10 years ago
- Bayesian analysis tool for pulsar timing☆12Jul 10, 2017Updated 9 years ago
- VHDL ieee_proposed library, imported as is. See also https://github.com/FPHDL/fphdl☆12Aug 26, 2016Updated 9 years ago
- Open source password manager - Proton Pass • AdSecurely store, share, and autofill your credentials with Proton Pass, the end-to-end encrypted password manager trusted by millions.
- This Repo contains SystemC for testBench for AMBA® 3 AHB-Lite Protocol☆14Jul 11, 2018Updated 8 years ago
- coursera code☆13Jun 27, 2013Updated 13 years ago
- Multi-Processor System on Chip with RISCV-32 / RISCV-64 / RISCV-128☆14Jun 19, 2026Updated last month
- Reference implementations of the GIMLI permutation☆15Jul 9, 2017Updated 9 years ago
- Simulates Attacks of AB16 on Argon2i☆11Aug 4, 2016Updated 9 years ago
- ☆13Aug 10, 2014Updated 11 years ago
- A wrapper for GHDL to make it look like Mentor's ModelSim. Helpful for use with programs like Sigasi.☆11Jan 21, 2018Updated 8 years ago
- A collection of useful scripts for creating various disk and fs topologies☆11Jun 19, 2025Updated last year
- ☆17Aug 16, 2023Updated 2 years ago
- Proton VPN Special Offer - Get 70% off • AdSpecial partner offer. Trusted by over 100 million users worldwide. Tested, Approved and Recommended by Experts.
- Go API client for arxiv.org☆20Feb 22, 2022Updated 4 years ago
- Examples and design pattern for VHDL verification☆15Apr 10, 2016Updated 10 years ago
- Is a collection of NULL Convention Logic (NCL) circuits and libraries written in Verilog to provide the experience of logically determine…☆15Jun 15, 2016Updated 10 years ago
- Hardware Snappy decompressor☆12Sep 11, 2024Updated last year
- Bitstream Fault Analysis Tool☆16Jul 17, 2023Updated 3 years ago
- SipHash: a fast short-input PRF☆61Jul 2, 2015Updated 11 years ago
- Powershell script to switch between logged in battlenet accounts☆10Sep 8, 2018Updated 7 years ago
- IEEE1588v2 Precision Time Protocol implementation☆13Jun 21, 2021Updated 5 years ago
- A DDS core written in VHDL.☆11Jan 5, 2019Updated 7 years ago
- AI Agents on DigitalOcean Gradient AI Platform • AdBuild production-ready AI agents using customizable tools or access multiple LLMs through a single endpoint. Create custom knowledge bases or connect external data.
- High-througput logic analyzer for FPGA☆17Oct 8, 2020Updated 5 years ago
- FPGA config visualized. demo:☆20Mar 17, 2020Updated 6 years ago
- Low level design of a chip built for optimizing/accelerating CNN classifiers over gray scale images.☆13May 14, 2019Updated 7 years ago
- Single-source shortest paths accelerated with AWS F1 FPGA☆14May 2, 2018Updated 8 years ago
- Processing Unit with RISCV-32 / RISCV-64 / RISCV-128☆20Jun 19, 2026Updated last month
- This project is a High and Low pass filter designer written in Octave to design and calculate the filter coefficients for a windows sinc …☆15May 3, 2015Updated 11 years ago
- Timing Sidechannel workshop☆30Nov 25, 2013Updated 12 years ago