Alternatives and similar repositories for siphash

Users that are interested in siphash are comparing it to the libraries listed below

• keystone-enclave / riscv-pk
  Security monitor for Keystone Enclave (mirror of riscv-pk). Will be deprecated when openSBI port is ready
  ☆35Updated 4 years ago
• lowRISC / lowrisc-fpga
  Untethered (stand-alone) FPGA implementation of the lowRISC SoC
  ☆56Updated 5 years ago
• scarv / xcrypto
  XCrypto: a cryptographic ISE for RISC-V
  ☆93Updated 2 years ago
• Poofjunior / fpga_fast_serial_sort
  a parallel sorting algorithm implemented in hardware that sorts data in linear time as it arrives serially
  ☆40Updated 9 years ago
• secworks / siphash
  Hardware implementation of the SipHash short-inout PRF
  ☆17Updated 4 months ago
• mjosaarinen / lwaes_isa
  [HISTORICAL] A Lightweight (RISC-V) ISA Extension for AES and SM4
  ☆37Updated 4 years ago
• secworks / chacha
  Verilog 2001 implementation of the ChaCha stream cipher.
  ☆42Updated 4 months ago
• inmcm / Simon_Speck_Ciphers
  Implementations of the Simon and Speck Block Ciphers
  ☆102Updated 7 years ago
• isec-tugraz / memsec
  Framework for building transparent memory encryption and authentication solutions
  ☆27Updated 7 years ago
• secworks / blake2
  Hardware implementation of the blake2 hash function
  ☆25Updated 4 years ago
• onchipuis / mriscvcore
  A 32-bit RISC-V processor for mriscv project
  ☆58Updated 8 years ago
• isec-tugraz / flecc_in_c
  FLECC_IN_C is a FLexible Elliptic Curve Cryptography library written IN C
  ☆18Updated 7 years ago
• ikwzm / SECURE_HASH
  SHA-1,SHA-256,SHA-512 Secure Hash Generator written in VHDL(RTL) for FPGA(Xilinx and Altera).
  ☆11Updated 7 years ago
• daniellustig / pipecheck
  ☆19Updated 10 years ago
• open-isa-org / open-isa.org
  Software, tools, documentation for Vegaboard platform
  ☆65Updated 5 years ago
• cornell-brg / pydgin
  A (Py)thon (D)SL for (G)enerating (In)struction set simulators.
  ☆166Updated 7 years ago
• westerndigitalcorporation / omnixtend
  An open standard Cache Coherent Fabric Interface repository
  ☆67Updated 5 years ago
• SRI-CSL / l3riscv
  An executable specification of the RISCV ISA in L3.
  ☆42Updated 6 years ago
• Netnod / FPGA_NTP_SERVER
  A FPGA implementation of the NTP and NTS protocols
  ☆59Updated 2 years ago
• vkrasnov / vpmadd
  Multiplication using AVX512 and AVX512IFMA instructions
  ☆23Updated 9 years ago
• CTSRD-CHERI / beri
  The BERI and CHERI processor and hardware platform
  ☆50Updated 8 years ago
• betrusted-io / gateware
  IP submodules, formatted for easier CI integration
  ☆30Updated last month
• secworks / blake2s
  Verilog implementation of the 32-bit version of the Blake2 hash function
  ☆21Updated 4 months ago
• ZipCPU / zipversa
  A Versa Board implementation using the AutoFPGA/ZipCPU infrastructure
  ☆16Updated 5 years ago
• YosysHQ / VlogHammer
  A Verilog Synthesis Regression Test
  ☆37Updated last year
• sancus-tee / sancus-core
  Minimal OpenMSP430 hardware extensions for isolation and attestation
  ☆23Updated 3 months ago
• hcrypt-project / oblivious
  Oblivious Memory Access under Fully Homomorphic Encryption
  ☆13Updated 10 years ago
• JohnDRO / Golirev-IDE
  An online Verilog IDE based on YosysJS.
  ☆24Updated 9 years ago
• warclab / dyract
  DyRACT Open Source Repository
  ☆16Updated 9 years ago
• cliffordwolf / xbitmanip
  RISC-V XBitmanip Extension
  ☆26Updated 6 years ago