lawrie / ulx3s_retroLinks
Retro computing on the Ulx3s ECP5 FPGA board
☆24Updated 3 years ago
Alternatives and similar repositories for ulx3s_retro
Users that are interested in ulx3s_retro are comparing it to the libraries listed below
Sorting:
- Bit streams forthe Ulx3s ECP5 device☆17Updated 2 years ago
- Programs for the FOMU, DE10NANO and ULX3S FPGA boards, written in Silice https://github.com/sylefeb/Silice☆36Updated 2 years ago
- Information on cores available on the Ulx3s ECP5 FPGA board☆14Updated 5 years ago
- NES FPGA implementation synthesized for the ulx3s ecp5 based fpga board☆38Updated 3 years ago
- ULX2S / ULX3S FPGA JTAG programmer & tools (Lattice XP2 / ECP5)☆23Updated 3 weeks ago
- Use ECP5 JTAG port to interact with user design☆32Updated 4 years ago
- CologneChip GateMate FPGA Module: GMM-7550☆22Updated this week
- ☆27Updated 5 years ago
- Quickly update a bitstream with new RAM contents☆15Updated 4 years ago
- CRUVI Standard Specifications☆19Updated last year
- PMOD boards for ULX3S☆45Updated 2 years ago
- nMigen examples for the ULX3S board☆16Updated 4 years ago
- Example Verilog code for Ulx3s☆41Updated 3 years ago
- Simplified environment for litex☆14Updated 4 years ago
- Drop In USB CDC ACM core for iCE40 FPGA☆35Updated 4 years ago
- crap-o-scope scope implementation for icestick☆20Updated 7 years ago
- Miscellaneous ULX3S examples (advanced)☆79Updated 3 months ago
- A basic HyperRAM controller for Lattice iCE40 Ultraplus FPGAs☆62Updated 6 years ago
- Utilities for the ECP5 FPGA☆18Updated 4 years ago
- The binaries for SaxonSoc Linux and other configurations☆17Updated 2 years ago
- Experiments with Cologne Chip's GateMate FPGA architecture☆16Updated last year
- PLEASE MOVE TO PAWSv2☆17Updated 3 years ago
- Update IceStudio to support ColorLight 5A-75X, i5 and ICeSugar Pro FPGA boards☆49Updated 2 years ago
- Quickstart binaries for flashing ULX3S to factory-default state☆26Updated 3 years ago
- IceCore Ice40 HX based modular core☆46Updated 4 years ago
- Simple BLE demo using an iOS app (SwiftUI), an ESP32 (Python) and an FPGA (Verilog)☆16Updated 4 years ago
- Development board for GateMateA1 CCGM1A1 FPGA from Cologne Chip with PS2 VGA 64Mbit RAM RP2040☆32Updated 9 months ago
- DVI video out example for prjtrellis☆16Updated 6 years ago
- Picorv32 SoC that uses only BRAM, not flash memory☆13Updated 6 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆19Updated 3 years ago