aquaxis / IPCORE

Related projects: ⓘ

• suisuisi / FPGA_Library
  Vivado诸多IP，包括图像处理等
  ☆157Updated last month
• suisuisi / FPGA
  FPGA
  ☆111Updated 4 years ago
• WalkerLau / DetectHumanFaces
  Real time face detection based on Arm Cortex-M3 DesignStart and FPGA
  ☆184Updated last year
• jiaowushuang / fpga_design
  这是我所开发的两个项目，包括ov5640-ddr3-usb2.0高速图像采集系统以及NOIP1SN1300A-ddr3-sdhc高速地表图像采集及存储系统
  ☆73Updated 6 years ago
• louisliuwei / PynqDocs
  PYNQ学习资料
  ☆153Updated 4 years ago
• suisuisi / FPGAandImage
  image processing based FPGA
  ☆94Updated 3 years ago
• BitOpenFPGA / arl
  lists of most popular repositories for most favoured programming languages (according to StackOverflow)
  ☆72Updated 3 years ago
• DexWen / FFT_Verilog
  FFT implement by verilog_测试验证已通过
  ☆47Updated 8 years ago
• WayneGong / Image_Rotate
  视频旋转（2019FPGA大赛）
  ☆28Updated 4 years ago
• flyjancy / CortexM0_SoC
  Cortex M0 based SoC
  ☆68Updated 3 years ago
• wudayemen / gen_apb_file
  ☆60Updated 3 years ago
• flyjancy / CortexM0_SoC_Task
  Step by step tutorial for building CortexM0 SoC
  ☆35Updated 2 years ago
• 9334swjtu / PYNQ_softmax
  achieve softmax in PYNQ with heterogeneous computing.
  ☆61Updated 5 years ago
• xupsh / pp4fpgas-cn-hls
  HLS Project of pp4fpgas - https://github.com/xupsh/pp4fpgas-cn
  ☆232Updated 3 years ago
• suisuisi / FPGAandStudy
  帮助大家进行FPGA的入门，分享FPGA相关的优秀文章，优秀项目
  ☆30Updated 2 years ago
• Verdvana / AXI4_Interconnect
  AXI总线连接器
  ☆89Updated 4 years ago
• 19801201 / SpinalHDL_CNN_Accelerator
  CNN accelerator implemented with Spinal HDL
  ☆128Updated 7 months ago
• Advanced-Microelectronics-Group / OpenC910_Modified
  commit rtl and build cosim env
  ☆35Updated 5 months ago
• freecores / dma_axi
  AXI DMA 32 / 64 bits
  ☆95Updated 10 years ago
• lizhirui / AXI_spec_chinese
  AXI协议规范中文翻译版
  ☆124Updated 2 years ago
• ljgibbslf / SM3_core
  ☆140Updated 3 years ago
• adki / gen_amba_2021
  AMBA bus generator including AXI4, AXI3, AHB, and APB
  ☆168Updated last year
• WangXuan95 / FPGA-MPEG2-encoder
  FPGA-based high performance MPEG2 encoder for video compression. 基于FPGA的高性能MPEG2视频编码器，可实现视频压缩。
  ☆108Updated 7 months ago
• CustomizableComputingLab / CustomizableComputingLab.github.io
  ☆133Updated last month
• john9636 / SortingNetwork
  Implement a bitonic sorting network on FPGA
  ☆38Updated 2 years ago
• maxs-well / Ethernet-design-verilog
  Gigabit Ethernet UDP communication driver
  ☆68Updated 5 years ago
• lulinchen / cnn_open
  A hardware implementation of CNN, written by Verilog and synthesized on FPGA
  ☆208Updated 5 years ago
• dpretet / async_fifo
  A dual clock asynchronous FIFO written in verilog, tested with Icarus Verilog
  ☆243Updated 4 months ago
• sumanth-kalluri / cnn_hardware_acclerator_for_fpga
  This is a fully parameterized verilog implementation of computation kernels for accleration of the Inference of Convolutional Neural Netw…
  ☆155Updated 5 months ago
• Qirun / ARM_Cortex-M3
  ☆112Updated this week