Alternatives and similar repositories for fxpmath

Users that are interested in fxpmath are comparing it to the libraries listed below

• Xilinx / XilinxBoardStore
  ☆286Updated this week
• Xilinx / finn-examples
  Dataflow QNN inference accelerator examples on FPGAs
  ☆213Updated last month
• ZipCPU / dspfilters
  A collection of demonstration digital filters
  ☆151Updated last year
• Xilinx / Vivado-Design-Tutorials
  ☆202Updated 2 weeks ago
• themperek / cocotb-test
  Unit testing for cocotb
  ☆157Updated 2 weeks ago
• jeremiah-c-leary / vhdl-style-guide
  Style guide enforcement for VHDL
  ☆206Updated last month
• Xilinx / finn-hlslib
  Vitis HLS Library for FINN
  ☆193Updated this week
• MakarenaLabs / Common-PL-Devices-on-PYNQ
  Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)
  ☆34Updated 3 years ago
• ZZZZzzzzac / numfi
  a subclass of numpy.ndarray that does fixed-point arithmetic
  ☆13Updated last month
• hdl-modules / hdl-modules
  A collection of reusable, high-quality, peer-reviewed VHDL building blocks.
  ☆163Updated this week
• Xilinx / Vitis_Model_Composer
  Vitis Model Composer Examples and Tutorials
  ☆98Updated last week
• slaclab / surf
  A huge VHDL library for FPGA and digital ASIC development
  ☆382Updated last week
• Xilinx / DSP-PYNQ
  A PYNQ overlay demonstrating Pythonic DSP running on Zynq UltraScale+
  ☆39Updated 2 years ago
• Xilinx / DPU-PYNQ
  DPU on PYNQ
  ☆219Updated last year
• KastnerRG / cgra4ml
  An Open Workflow to Build Custom SoCs and run Deep Models at the Edge
  ☆76Updated 2 weeks ago
• xupgit / Zynq-Design-using-Vivado
  This XUP course provides an introduction to embedded system design on Zynq using the Xilinx Vivado software suite.
  ☆84Updated last year
• freecores / verilog_fixed_point_math_library
  Fixed Point Math Library for Verilog
  ☆128Updated 10 years ago
• alexforencich / cocotbext-axi
  AXI interface modules for Cocotb
  ☆256Updated last year
• smlgit / fpbinary
  Fixed point package for Python.
  ☆35Updated 2 years ago
• thesps / conifer
  Fast inference of Boosted Decision Trees in FPGAs
  ☆53Updated last month
• fpgasystems / spooNN
  FPGA-based neural network inference project with an end-to-end approach (from training to implementation to deployment)
  ☆271Updated 5 years ago
• Xilinx / Embedded-Design-Tutorials
  ☆132Updated 3 weeks ago
• definelicht / hlslib
  A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.
  ☆318Updated 3 months ago
• ZipCPU / dblclockfft
  A configurable C++ generator of pipelined Verilog FFT cores
  ☆240Updated last year
• Fraunhofer-IMS / airisc_core_complex
  Fraunhofer IMS processor core. RISC-V ISA (RV32IM) with additional peripherals for embedded AI applications and smart sensors.
  ☆91Updated last year
• phanrahan / magma
  magma circuits
  ☆260Updated 6 months ago
• slaclab / ruckus
  FPGA and Digital ASIC Build System
  ☆74Updated last week
• Xilinx / PYNQ_RFSOC_Workshop
  Open-sourcing the PYNQ & RFSoC workshop materials
  ☆60Updated 4 years ago
• fastmachinelearning / hls4ml-tutorial
  Tutorial notebooks for hls4ml
  ☆338Updated last week
• drichmond / RISC-V-On-PYNQ
  RISC-V Integration for PYNQ
  ☆172Updated 5 years ago