ZZZZzzzzac / numfiLinks
a subclass of numpy.ndarray that does fixed-point arithmetic
☆13Updated 7 months ago
Alternatives and similar repositories for numfi
Users that are interested in numfi are comparing it to the libraries listed below
Sorting:
- A python library for fractional fixed-point (base 2) arithmetic and binary manipulation with Numpy compatibility.☆199Updated last year
- A configurable C++ generator of pipelined Verilog FFT cores☆249Updated last year
- A collection of demonstration digital filters☆156Updated last year
- A port of the MATLAB Delta Sigma Toolbox based on free software and very little sleep☆94Updated 3 years ago
- A highly optimized streaming FFT core based on Bailey's 4-step large FFT algorithm☆123Updated 4 years ago
- APyTypes - Algorithmic data types for Python☆38Updated this week
- Control and Status Register map generator for HDL projects☆127Updated 5 months ago
- A collection of phase locked loop (PLL) related projects☆112Updated last year
- Fixed point package for Python.☆36Updated 2 years ago
- A Python package to use FPGA development tools programmatically.☆140Updated 7 months ago
- VHDL-2008 Support Library☆57Updated 9 years ago
- A series of CORDIC related projects☆117Updated 11 months ago
- RFSoC Spectrum Analyser Module on PYNQ.☆87Updated last year
- Hardware description (VHDL) and configuration scripts (Python) of a versatile IIR Filter implemented as cascaded SOS/biquads. No vendor-s…☆21Updated 7 years ago
- WaveDrom compatible python command line☆109Updated 2 years ago
- Tutorial on how to use the PL to PS interrupt on the Zedboard☆27Updated 8 years ago
- Implementation and test of reusable sigma-delta A/D converters written in SystemVerilog on a MAX10 FPGA with minimal external components☆76Updated 3 years ago
- A collection of reusable, high-quality, peer-reviewed VHDL building blocks.☆185Updated 2 weeks ago
- Style guide enforcement for VHDL☆226Updated 3 weeks ago
- Python/C/RTL cosimulation with Xilinx's xsim simulator☆76Updated 3 months ago
- An open-source HDL register code generator fast enough to run in real time.☆75Updated last week
- Verilog digital signal processing components☆158Updated 3 years ago
- sliding DFT for FPGA, targetting Lattice ICE40 1k☆76Updated 5 years ago
- Delta-sigma audio DAC (16b, 48kHz), intended for tape-out on MPW-5, SKY130 technology.☆35Updated 3 years ago
- Model SAR ADC with python!☆22Updated 3 years ago
- PYNQ example of using the RFSoC as a QPSK transceiver.☆108Updated 2 years ago
- Limited python / cocotb interface to Xilinx/AMD Vivado simulator.☆65Updated last month
- Fully pipelined Integer Scaled / Unscaled Radix-2 Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source la…☆87Updated 2 years ago
- Digital systems are clocked. This project is about constructing a high-Q clock by simmering an ordinary quartz crystal in a heavy numeric…☆17Updated last week
- assorted library of utility cores for amaranth HDL☆97Updated last year