Alternatives and similar repositories for DRFM

Users that are interested in DRFM are comparing it to the libraries listed below

• mathworks / FPGA-Adaptive-Beamforming-and-Radar-Examples
  This repository contains FPGA/HDL demonstrations several beamforming and radar designs. Simulink models and MATLAB reference code are pro…
  ☆69Updated last year
• ajackevic / ELEC5882
  The Design and Implementation of a Pulse Compression Filter on an FPGA.
  ☆30Updated 3 years ago
• phthinh / OFDM_802_16
  IEEE 802.16 OFDM-based transceiver system
  ☆25Updated 5 years ago
• Elrori / FMCW_Radar
  FMCW Radar verilog project
  ☆32Updated 5 years ago
• alphansahin / mmWaveSDR
  This repository includes the source codes for the mmWave SDR developed at the University of South Carolina for the AERPAW at NCSU for wir…
  ☆48Updated 9 months ago
• falwat / code_repo
  My code repositry for common use.
  ☆22Updated 3 years ago
• codyps / wimax_ofdm
  Partial Verilog implimentation of a WiMAX OFDM Phy
  ☆19Updated 13 years ago
• strath-sdr / rfsoc_ofdm
  PYNQ example of an OFDM Transmitter and Receiver on RFSoC.
  ☆50Updated 2 years ago
• jouyang3 / FMCW
  Miniature 8GHz FMCW Radar
  ☆11Updated 9 years ago
• Lcrypto / FEC-Archive-Verilog
  Verilog Forward Error Correction Archive: BOX-Muller for fast AWGN generation, Universal Demapper from BPSK to QAM-512, different Forward…
  ☆71Updated 2 years ago
• fpga-soc / mil-std-1553b-soc
  development interface mil-std-1553b for system on chip
  ☆21Updated 7 years ago
• Grootzz / Verilog-FIR
  FIR implemention with Verilog
  ☆48Updated 6 years ago
• strath-sdr / rfsoc_frequency_planner
  An RFSoC Frequency Planner developed using Python.
  ☆29Updated 2 years ago
• Teddy-van-Jerry / sdr-psk-fpga
  Dual-Mode PSK Transceiver on SDR With FPGA
  ☆38Updated 9 months ago
• mathworks / HDL-Coder-Self-Guided-Tutorial
  Learn how to deploy an algorithm to an FPGA using MATLAB and Simulink.
  ☆78Updated 6 months ago
• MazinLab / RFSoC_OPFB
  A High-Throughput Oversampled Polyphase Filter Bank Using Vivado HLS and PYNQ on a RFSoC
  ☆37Updated 10 months ago
• matthuszagh / fmcw
  6GHz frequency-modulated continuous-wave radar with real-time range detection
  ☆48Updated 4 years ago
• benreynwar / fpga-sdrlib
  Verilog modules for software-defined radio.
  ☆18Updated 12 years ago
• abhishekgb / Kalman-Filter-verilog
  Hey guys this the project where i have implemented the Kalman filter for MPPT for solar PV module
  ☆19Updated 7 years ago
• strath-sdr / pynq_agc
  Demonstration of Automatic Gain Control with PYNQ
  ☆15Updated 3 years ago
• phthinh / OFDM_802_11
  IEEE 802.11 OFDM-based transceiver system
  ☆34Updated 7 years ago
• LHesperus / Radar-Signal-Generation-and-Processing-Experiment
  UESTC-雷达信号产生与处理的设计与验证
  ☆20Updated 6 years ago
• mwrnd / innova2_xcku15p_ddr4_bram_gpio
  XDMA PCIe to DDR4 and GPIO and BRAM for the Innova-2 Flex XCKU15P FPGA
  ☆18Updated last year
• strath-sdr / rfsoc_radio
  PYNQ example of using the RFSoC as a QPSK/BPSK radio transceiver.
  ☆37Updated 2 years ago
• Grootzz / AD9361_TX_MSK
  A project demonstrate how to config ad9361 to TX mode and how to transmit MSK
  ☆58Updated 6 years ago
• analogdevicesinc / TransceiverToolbox
  MATLAB toolbox for ADI transceiver products
  ☆62Updated 3 months ago
• whc2uestc / BD3_FPGA
  新一代北斗卫星导航监测接收机的FPGA实现
  ☆28Updated 9 years ago
• FernandoGuiomar / CPR_VHDL
  VHDL implementation of carrier phase recovery (CPR) techniques for coherent optical systems
  ☆14Updated 4 years ago
• strath-sdr / rfsoc_notebooks
  A collection of RFSoC introductory notebooks for PYNQ.
  ☆23Updated 3 years ago
• liuguangxi / gng
  Gaussian noise generator Verilog IP core
  ☆31Updated 2 years ago