Alternatives and similar repositories for riscv-cfi:

Users that are interested in riscv-cfi are comparing it to the libraries listed below

• riscv-non-isa / riscv-security-model
  RISC-V Security Model
  ☆30Updated last month
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆113Updated last week
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆50Updated last week
• riscv / riscv-CMOs
  ☆86Updated 2 years ago
• rivosinc / salus
  Risc-V hypervisor for TEE development
  ☆113Updated last week
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆147Updated 2 months ago
• comsec-group / cascade-artifacts
  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
  ☆126Updated 8 months ago
• nbdd0121 / r2vm
  Rust RISC-V Virtual Machine
  ☆97Updated 6 months ago
• riscvarchive / riscv-code-size-reduction
  ☆150Updated last year
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆91Updated last month
• riscv / riscv-aia
  ☆89Updated last month
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆149Updated 2 weeks ago
• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆58Updated 3 weeks ago
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆183Updated last week
• riscv / riscv-plic-spec
  PLIC Specification
  ☆140Updated 2 years ago
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆77Updated last year
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆63Updated 5 years ago
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆65Updated last month
• riscv / riscv-cheri
  This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory prot…
  ☆67Updated this week
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆76Updated 2 months ago
• riscv / riscv-fast-interrupt
  Proposal for a RISC-V Core-Local Interrupt Controller (CLIC)
  ☆267Updated this week
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆151Updated 3 years ago
• riscv / virtual-memory
  ☆36Updated 3 years ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆184Updated 2 months ago
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆21Updated 2 months ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆39Updated last year
• riscv-software-src / riscv-unified-db
  Machine-readable database of the RISC-V specification, and tools to generate various views
  ☆61Updated this week
• riscv-ovpsim / imperas-riscv-tests
  ☆173Updated last year
• riscv-software-src / riscof
  ☆78Updated last month
• ucb-bar / libgloss-htif
  A libgloss replacement for RISC-V that supports HTIF
  ☆35Updated last year