Alternatives and similar repositories for riscv-cfi:

Users that are interested in riscv-cfi are comparing it to the libraries listed below

• riscv-non-isa / riscv-security-model
  RISC-V Security Model
  ☆29Updated this week
• comsec-group / cascade-artifacts
  Artifacts for Cascade: CPU Fuzzing via Intricate Program Generation (USENIX Security 2024)
  ☆121Updated 5 months ago
• riscv-non-isa / riscv-iommu
  RISC-V IOMMU Specification
  ☆102Updated last month
• riscv / riscv-smmtt
  This specification will define the RISC-V privilege ISA extensions required to support Supervisor Domain isolation for multi-tenant secur…
  ☆42Updated last month
• rivosinc / salus
  Risc-V hypervisor for TEE development
  ☆106Updated last year
• cispa / Security-RISC
  Proof-of-concept implementation for the paper "A Security RISC: Microarchitectural Attacks on Hardware RISC-V CPUs" (IEEE S&P 2023)
  ☆56Updated 5 months ago
• riscv / riscv-CMOs
  ☆83Updated 2 years ago
• CTSRD-CHERI / sail-cheri-riscv
  CHERI-RISC-V model written in Sail
  ☆56Updated this week
• zero-day-labs / riscv-iommu
  IOMMU IP compliant with the RISC-V IOMMU Specification v1.0
  ☆84Updated this week
• riscv / riscv-control-transfer-records
  This repo contains a RISC-V ISA extension (proposal) to allow recording of control transfer history to on-chip registers, to support usag…
  ☆18Updated 3 weeks ago
• riscv-boom / boom-attacks
  Proof of concepts for speculative attacks using the BOOM core (https://github.com/riscv-boom/riscv-boom)
  ☆61Updated 5 years ago
• riscv-non-isa / riscv-toolchain-conventions
  Documenting the expected behaviour and supported command-line switches for GNU and LLVM based RISC-V toolchains
  ☆147Updated last week
• riscvarchive / riscv-code-size-reduction
  ☆151Updated 11 months ago
• ucb-bar / riscv-torture
  RISC-V Torture Test
  ☆177Updated 6 months ago
• nbdd0121 / r2vm
  Rust RISC-V Virtual Machine
  ☆91Updated 2 months ago
• riscv / riscv-j-extension
  Working Draft of the RISC-V J Extension Specification
  ☆173Updated this week
• litmus-tests / litmus-tests-riscv
  RISC-V architecture concurrency model litmus tests
  ☆74Updated last year
• ekiwi / rfuzz
  rfuzz: coverage-directed fuzzing for RTL research platform
  ☆100Updated 2 years ago
• riscv-non-isa / server-soc
  The repo holds the draft non-ISA Server SoC specification being developed by the Server SoC specification TG and to release intermediate …
  ☆22Updated last week
• riscv / riscv-profiles
  RISC-V Architecture Profiles
  ☆127Updated last week
• riscv-non-isa / riscv-trace-spec
  RISC-V Processor Trace Specification
  ☆168Updated last month
• riscv / virtual-memory
  ☆36Updated 3 years ago
• michaeljclark / riscv-disassembler
  RISC-V Disassembler with support for RV32/RV64/RV128 IMAFDC
  ☆98Updated 2 years ago
• riscv-ovpsim / imperas-riscv-tests
  ☆167Updated last year
• bucaps / marss-riscv
  TinyEMU based full system cycle-level micro-architectural research simulator for single-core RISC-V systems
  ☆146Updated 2 years ago
• riscv-non-isa / riscv-c-api-doc
  Documentation of the RISC-V C API
  ☆74Updated 2 weeks ago
• josecm / riscv-hyp-tests
  A bare-metal application to test specific features of the risc-v hypervisor extension
  ☆36Updated last year
• riscvarchive / riscv-tee
  ☆38Updated 2 years ago
• riscv / riscv-cheri
  This repository contains the CHERI extension specification, adding hardware capabilities to RISC-V ISA to enable fine-grained memory prot…
  ☆59Updated last week
• chipsalliance / dromajo
  RISC-V RV64GC emulator designed for RTL co-simulation
  ☆220Updated 2 months ago