dian-lun-lin / GenFuzzLinks
GPU-enabled Hardware Fuzzer using Genetic Algorithm
☆18Updated 2 years ago
Alternatives and similar repositories for GenFuzz
Users that are interested in GenFuzz are comparing it to the libraries listed below
Sorting:
- ☆13Updated last year
- Code repository for Coppelia tool☆23Updated 4 years ago
- A behavioural cache model for analysing the cache behaviour under side-channel attack.☆26Updated 3 months ago
- ☆16Updated 4 years ago
- ☆19Updated last year
- Hardware Formal Verification Tool☆67Updated last month
- ☆19Updated last year
- rfuzz: coverage-directed fuzzing for RTL research platform☆111Updated 3 years ago
- ☆95Updated last year
- ☆11Updated 3 months ago
- A tool for checking the contract satisfaction for hardware designs☆11Updated 3 weeks ago
- Project Repo for the Simulator Independent Coverage Research☆21Updated 2 years ago
- Gem5 implementation of "InvisiSpec", a defense mechanism of speculative execution attacks on cache hierarchy.☆60Updated 5 years ago
- A Modular Open-Source Hardware Fuzzing Framework☆34Updated 3 years ago
- CleanupSpec (MICRO-2019)☆16Updated 4 years ago
- Artifact evaluation of paper: MorFuzz: Fuzzing Processor via Runtime Instruction Morphing enhanced Synchronizable Co-simulation☆45Updated 5 months ago
- Recent papers related to hardware formal verification.☆73Updated 2 years ago
- Fuzzing General-Purpose Hardware Designs with Software Fuzzers☆21Updated 3 weeks ago
- ☆23Updated 6 months ago
- ☆87Updated 2 years ago
- All the tools you need to reproduce the CellIFT paper experiments☆22Updated 7 months ago
- Security Test Benchmark for Computer Architectures☆21Updated last week
- Artifact, reproducibility, and testing utilites for gem5☆23Updated 4 years ago
- LLM Evaluation Benchmark on Hardware Formal Verification☆30Updated 6 months ago
- ☆17Updated last year
- Data oblivious ISA prototyped on the RISC-V BOOM processor.☆22Updated 3 years ago
- ☆25Updated 2 years ago
- The SoC used for the beta phase of Hack@DAC 2018.☆17Updated 5 years ago
- Automated Repair of Verilog Hardware Descriptions☆33Updated 8 months ago
- generating DFG and CFG from source code (using LLVM ) or from binary (using LLVM and Mcsema) 二进制或者源码转CGF& DFG☆41Updated 6 years ago