Modular SRAM-based indirectly-indexed 2D hierarchical-search Binary Content Addressable Memory (II-2D-BCAM)
☆17Nov 10, 2024Updated last year
Alternatives and similar repositories for Indirectly-Indexed-2D-Binary-Content-Addressable-Memory-BCAM
Users that are interested in Indirectly-Indexed-2D-Binary-Content-Addressable-Memory-BCAM are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Modular SRAM-based 2D hierarchical-search Binary Content Addressable Memory (2D-BCAM)☆23Nov 10, 2024Updated last year
- Switched SRAM-based Multi-ported RAM☆19Nov 10, 2024Updated last year
- Modular Multi-ported SRAM-based Memory☆33Nov 8, 2024Updated last year
- Verification IP for Watchdog☆13Apr 6, 2021Updated 5 years ago
- ☆10Jan 30, 2019Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- ☆10Jun 26, 2025Updated last year
- Verilog CAN controller that is compatible to the SJA 1000.☆20Apr 17, 2021Updated 5 years ago
- FPGA based PDP-11 cpu☆19Jan 2, 2016Updated 10 years ago
- TCAM (Ternary Content-Addressable Memory) in Verilog☆59Oct 9, 2023Updated 3 years ago
- PowerPC implemented in Verilog for an FPGA.☆14Sep 12, 2024Updated 2 years ago
- Code from the book "FreeBSD Device Drivers: A Guide for the Intrepid"☆12Oct 10, 2016Updated 10 years ago
- Firmware for the FX2 which emulates the FTDI serial chips (including MPSSE support).☆19Aug 7, 2018Updated 8 years ago
- Network Development Kit (NDK) for FPGA cards with example application☆99Updated this week
- Verilog Content Addressable Memory Module☆118Mar 2, 2022Updated 4 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Design consists of a 32-bit MIPS superscalar pipeline processor in functional Verilog. Runs a cache based memory system, a branch predict…☆14Oct 9, 2017Updated 9 years ago
- Latest in the line of the E32 processors with better/generic cache placement☆10Feb 25, 2023Updated 3 years ago
- A Tutorial for tools developed on the DARPA CASE program☆17Oct 18, 2023Updated 3 years ago
- A near gate-level Verilog simulation of the 6502 microprocessor.☆23Dec 25, 2024Updated last year
- A new sample driver for A/UX☆18Sep 28, 2022Updated 4 years ago
- Fork of github.com/UCSBarchlab/OpenTPU for the TGPTPU project☆14Jun 1, 2025Updated last year
- Constraint files for Hardware Description Language (HDL) designs targeting FPGA boards☆49Feb 12, 2026Updated 8 months ago
- VexRiscV system with GDB-Server in Hardware☆21Jul 5, 2023Updated 3 years ago
- ☆15Sep 25, 2026Updated last month
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- This linter plugin for SublimeLinter provides an interface to iverilog (verilog compiler).☆13Apr 16, 2024Updated 2 years ago
- Lattice ice40 up5k Raspberry Pi hat designed for using the secondary memory interface (SMI)☆16Nov 11, 2020Updated 5 years ago
- Library to access /proc/device-tree from userspace in an embedded Linux. Under GNU GPL license.☆14Apr 9, 2018Updated 8 years ago
- A FIFO or Queue is an array of memory commonly used in hardware to transfer transfer data between two circuits with different clocks. The…☆16Nov 5, 2017Updated 8 years ago
- HP16717 logic analyzer card schematic☆22Sep 7, 2026Updated last month
- Collection of resources for the Alibaba Cloud AS02MC04 Kintex KU3P UltraScale+ board☆23Jan 6, 2026Updated 9 months ago
- Support for automatic address map generation and address decoding logic for Wishbone connected hierachical systems☆12Sep 1, 2026Updated last month
- Avnet Board Definition Files☆148Jan 12, 2026Updated 9 months ago
- Verilog Code and Logisim simulation of a Weighted Round Robit Arbiter circuit using digital components☆20Mar 10, 2018Updated 8 years ago
- Managed Database hosting by DigitalOcean • AdPostgreSQL, MySQL, MongoDB, Kafka, Valkey, and OpenSearch available. Automatically scale up storage and focus on building your apps.
- Implementation of the CCSDS TM and TC standards for the AcubeSAT nanosatellite☆17Dec 22, 2025Updated 10 months ago
- A pipelined MIPS processor written in VHDL (Unicamp/MC542)☆10Dec 8, 2011Updated 14 years ago
- Ms Thesis @ FEUP☆39Jul 16, 2024Updated 2 years ago
- Standalone IP with ARM-AMBA/AXI capable device. Enables sending and receiving data via SpaceWire protocol. Tested on Xilinx FPGA (ZYNQ).☆13Jul 12, 2024Updated 2 years ago
- SpaceWire☆14Jul 17, 2014Updated 12 years ago
- MCP documentation server for embedded developers. Ingests PDF reference manuals (1000+ pages), extracts register definitions, and provide…☆14Feb 17, 2026Updated 8 months ago
- Fan control for Macs running Linux☆22Sep 11, 2025Updated last year