darrinwillis / neuralHardware
☆22Updated 7 years ago
Related projects ⓘ
Alternatives and complementary repositories for neuralHardware
- Verilog library for implementing neural networks.☆24Updated 10 years ago
- Artificial Neural Network on Altera DE2☆32Updated 9 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆28Updated 7 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆19Updated 6 years ago
- A multi-board Extended Kalman Filter (EKF)☆28Updated 6 years ago
- Package for performing fixed-point, arbitrary-precision arithmetic in Python.☆64Updated 8 months ago
- Rapidly deploy Chisel and Vivado HLS accelerators on Xilinx PYNQ☆33Updated 6 years ago
- Voice Recognition using FPGA-Based Neural Networks☆11Updated 8 years ago
- ☆82Updated 4 years ago
- Xilinx Contest Kshitij 2019☆19Updated last year
- Adding PR to the PYNQ Overlay☆17Updated 7 years ago
- verilog CNN generator for FPGA☆32Updated 3 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆15Updated 7 years ago
- ☆42Updated 3 years ago
- ☆119Updated 6 years ago
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆32Updated 6 years ago
- ☆104Updated 5 years ago
- ☆23Updated 6 years ago
- ☆32Updated last year
- Zynq Workshop for Beginners☆28Updated 9 years ago
- ☆45Updated 4 years ago
- Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).☆55Updated 2 years ago
- AES crypto engine written in System Verilog and emulated on the Mentor Veloce. First place winner of Mentor Graphics Need For Speed Emula…☆14Updated 7 years ago
- Template for projects using the Hwacha data-parallel accelerator☆34Updated 4 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆33Updated 5 years ago
- Updated version of the XUP Workshops☆17Updated 6 years ago
- openHMC - an open source Hybrid Memory Cube Controller☆44Updated 8 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆47Updated 7 years ago
- Tutorial for integrating PyMTL and Vivado HLS☆17Updated 8 years ago