MohammedRashad / FPGA-Speech-Recognition
Expiremental Speech Recognition System using VHDL & MATLAB.
☆45Updated 6 years ago
Alternatives and similar repositories for FPGA-Speech-Recognition:
Users that are interested in FPGA-Speech-Recognition are comparing it to the libraries listed below
- Image Processing on FPGA using VHDL☆41Updated 10 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆103Updated 4 years ago
- synthesizable FFT IP block for FPGA designs☆31Updated 5 years ago
- Verilog modules required to get the OV7670 camera working☆65Updated 6 years ago
- Distributed arithmetic (DA) is another way of implementing a dot product where one of the arrays has constant elements. The DA can be eff…☆15Updated 3 years ago
- Adding PR to the PYNQ Overlay☆17Updated 7 years ago
- A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models☆32Updated 6 years ago
- Generic FIFO implementation with optional FWFT☆55Updated 4 years ago
- Learn about image processing with an FPGA. Video lectures explain algorithm and implementation of lane detection for automotive driving. …☆33Updated 9 months ago
- Zynq Workshop for Beginners☆28Updated 9 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆39Updated last year
- Basic Peripheral SoC (SPI, GPIO, Timer, UART)☆62Updated 4 years ago
- This is the repository for a verilog implementation of a lzrw1 compression core☆18Updated 7 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆28Updated 8 years ago
- This a complete and fully working Viola-Jones face detection algorithm described in VHDL and verified on the DE2-115 FPGA board.☆43Updated 8 years ago
- learn the combinational and sequential logic circuit.☆12Updated 2 weeks ago
- Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).☆57Updated 2 years ago
- IP operations in verilog (simulation and implementation on ice40)☆55Updated 5 years ago
- A guide to creating custom AXI-lite slave peripherals using the Xilinx Vivado tools☆40Updated 6 years ago
- I2C controller core from Opencores.org☆25Updated 13 years ago
- ☆17Updated last year
- ☆54Updated 2 years ago
- A CIC filter implemented in Verilog☆22Updated 9 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- Generate testbench for your verilog module.☆36Updated 6 years ago
- SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs☆15Updated 5 years ago
- Verilog library for implementing neural networks.☆26Updated 10 years ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆50Updated 7 years ago
- RTL Verilog library for various DSP modules☆84Updated 3 years ago
- development interface mil-std-1553b for system on chip☆21Updated 7 years ago