ironstein0 / handwriting-recognition-using-neural-networks-on-FPGA-final-year-project
☆22Updated 6 years ago
Related projects: ⓘ
- Verilog library for implementing neural networks.☆24Updated 10 years ago
- verilog CNN generator for FPGA☆32Updated 3 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆19Updated 6 years ago
- implementing a Recurrent Neural Network with binarized weight format on FPGA☆22Updated 7 years ago
- Verilog Convolutional Neural Network on PYNQ☆27Updated 6 years ago
- The objective is to implement a Neural Network in VHDL code. It is aiming the Cyclone II FPGA Starter Development Kit hardware, but the N…☆28Updated 7 years ago
- This repo has codes for hardware accelerator design for CNNs using high level synthesis from Altera.☆13Updated 6 years ago
- ☆19Updated 7 years ago
- ☆43Updated 4 years ago
- Artificial Neural Network on Altera DE2☆32Updated 8 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆169Updated 7 years ago
- Convolution Neural Network of vgg19 model in verilog☆42Updated 6 years ago
- Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs☆47Updated 7 years ago
- Image Processing on FPGA using VHDL☆40Updated 10 years ago
- Who doesn’t dream of a new FPGA family that can provide embedded hard neurons in its silicon architecture fabric instead of the conventio…☆17Updated 6 years ago
- collection of works aiming at reducing model sizes or the ASIC/FPGA accelerator for machine learning☆7Updated 7 years ago
- ☆13Updated 8 years ago
- EE 260 Winter 2017: Advanced VLSI Design☆57Updated 7 years ago
- An Synthesizable Deep Learning Library based on Xilinx High Level Synthesis(HLS) tool☆15Updated 7 years ago
- ☆13Updated 4 years ago
- A trained Convolutional Neural Network implemented on ZedBoard Zynq-7000 FPGA.☆84Updated 9 months ago
- This is a simple project that shows how to multiply two 3x3 matrixes in Verilog.☆47Updated 7 years ago
- Embedded hardware accelerator of multilayer perceptrons for lightweight machine learning☆16Updated 7 years ago
- FPGA implementation of Cellular Neural Network (CNN)☆133Updated 6 years ago
- This is the first step to implement RNN on FPGAs. All modules are heavily commented. We will use High-Level Synthesis to turn these code …☆20Updated 5 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 5 years ago
- ☆63Updated 2 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆103Updated 7 years ago
- At present, just an example to show how to map the detection algorithm YOLOv2 from model to FPGA☆31Updated 5 years ago
- ☆86Updated 4 years ago