Alternatives and similar repositories for FPGA_Neural-Network

Users that are interested in FPGA_Neural-Network are comparing it to the libraries listed below

• brianhill11 / FPGA-CNN
  This repo is for ECE44x (Fall2015-Spring2016)
  ☆20Updated 7 years ago
• FelixWinterstein / Vivado-KMeans
  Hand-written HDL code and C-based HLS designs for K-means clustering implementations on FPGAs
  ☆48Updated 8 years ago
• MinLiAmoy / rnn-fpga
  implementing a Recurrent Neural Network with binarized weight format on FPGA
  ☆22Updated 8 years ago
• shaneleonard / neural-hardware
  Verilog library for implementing neural networks.
  ☆27Updated 11 years ago
• eliaskousk / parallella-riscv
  RISC-V Rocket Core on Parallella & ZedBoard Zynq FPGA Boards
  ☆106Updated 7 years ago
• intel / rapid-design-methods-for-developing-hardware-accelerators
  ☆88Updated 3 years ago
• jbush001 / PASC
  Parallel Array of Simple Cores. Multicore processor.
  ☆99Updated 6 years ago
• hukenovs / fp23fftk
  Floating point Forward/Inverse Fast Fourier Transform (FFT) IP-core for newest Xilinx FPGAs (Source lang. - VHDL).
  ☆61Updated 3 years ago
• alan4186 / Hardware-CNN
  A convolutional neural network implemented in hardware (verilog)
  ☆166Updated 8 years ago
• diaoenmao / FPGA-CNN
  FPGA implementation of Cellular Neural Network (CNN)
  ☆142Updated 7 years ago
• bmartini / verilog-arbiter
  A look ahead, round-robing parametrized arbiter written in Verilog.
  ☆43Updated 5 years ago
• ZipCPU / autofpga
  A utility for Composing FPGA designs from Peripherals
  ☆186Updated last year
• damdoy / fpga_image_processing
  IP operations in verilog (simulation and implementation on ice40)
  ☆62Updated 6 years ago
• unihd-cag / openhmc
  openHMC - an open source Hybrid Memory Cube Controller
  ☆50Updated 9 years ago
• onchipuis / mriscv
  A 32-bit Microcontroller featuring a RISC-V core
  ☆160Updated 7 years ago
• olofk / fifo
  Generic FIFO implementation with optional FWFT
  ☆61Updated 5 years ago
• benreynwar / fft-dit-fpga
  Verilog module for calculation of FFT.
  ☆191Updated 13 years ago
• freecores / verilog_fixed_point_math_library
  Fixed Point Math Library for Verilog
  ☆145Updated 11 years ago
• bu-icsg / dana
  Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
  ☆220Updated 5 years ago
• chiggs / oc_jpegencode
  Fork of OpenCores jpegencode with Cocotb testbench
  ☆46Updated 10 years ago
• cebarnes / cordic
  An implementation of the CORDIC algorithm in Verilog.
  ☆107Updated 7 years ago
• malkadi / FGPU
  FGPU is a soft GPU architecture general purpose computing
  ☆61Updated 5 years ago
• SanjayRai / PCIE_AXI_BRIDGE
  Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices
  ☆32Updated 9 years ago
• cornell-zhang / facedetect-fpga
  ☆46Updated 5 years ago
• cnrv / CNRV-FPU
  Basic floating-point components for RISC-V processors
  ☆67Updated 6 years ago
• dawsonjon / verilog-math
  Mathematical Functions in Verilog
  ☆96Updated 4 years ago
• sheldonucr / ee260_lab
  EE 260 Winter 2017: Advanced VLSI Design
  ☆68Updated 9 years ago
• Architech-Silica / Designing-a-Custom-AXI-Master-using-BFMs
  A guide to creating custom AXI4 masters using the Xilinx Vivado tools and Bus Functional Models
  ☆35Updated 7 years ago
• LBL-CoDEx / OpenSoCFabric
  OpenSoC Fabric - A Network-On-Chip Generator
  ☆175Updated 5 years ago
• bmartini / zynq-axis
  Hardware, Linux Driver and Library for the Zynq AXI DMA interface
  ☆104Updated 7 years ago