lankas / SqueezeNet
☆39Updated 7 years ago
Alternatives and similar repositories for SqueezeNet:
Users that are interested in SqueezeNet are comparing it to the libraries listed below
- ☆119Updated 7 years ago
- ☆45Updated 4 years ago
- OpenCL Labs for PAPAA Summer School 2016 Edition☆46Updated 7 years ago
- ☆83Updated 4 years ago
- The 1st place winner's source codes for DAC 2018 System Design Contest, FPGA Track☆89Updated 6 years ago
- FireSim-NVDLA: NVIDIA Deep Learning Accelerator (NVDLA) Integrated with RISC-V Rocket Chip SoC Running on the Amazon FPGA Cloud☆161Updated 3 years ago
- Xilinx Deep Learning IP☆92Updated 3 years ago
- CaffePresso: An Optimized Library for Deep Learning on Embedded Accelerator-based platforms☆88Updated 3 months ago
- Light-weighted neural network inference for object detection on small-scale FPGA board☆91Updated 5 years ago
- Example code and instructions on getting Tensorflow Lite running on a Xilinx Zynq☆49Updated 7 years ago
- A discussion group on Open Source Deep Learning Accelerator, with technical reports and potential hardware/software issues.☆138Updated 7 years ago
- Caffe to VHDL☆66Updated 4 years ago
- HLS based Deep Neural Network Accelerator Library for Xilinx Ultrascale+ MPSoCs☆325Updated 5 years ago
- ☆53Updated 5 years ago
- Formerly known as the 'reVISION Getting Started Guide', the Embedded Reference Platforms User Guide covers the embedded vision reference …☆11Updated 10 months ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- ☆19Updated 7 years ago
- Residual Binarized Neural Network☆44Updated 6 years ago
- ☆35Updated 8 years ago
- Design contest for DAC 2018☆17Updated 6 years ago
- SDSoC™ (Software-Defined System-On-Chip) Environment Tutorials☆147Updated 5 years ago
- Open Source Specialized Computing Stack for Accelerating Deep Neural Networks.☆207Updated 5 years ago
- Implementing CNN code in CUDA and OpenCL to evaluate its performance on NVIDIA GPUs, AMD GPUs, and an FPGA platform.☆54Updated 7 years ago
- Aiming at an AI Chip based on RISC-V and NVDLA.☆20Updated 6 years ago
- Matrix Operation Library for FPGA https://xilinx.github.io/gemx/☆63Updated 5 years ago
- HLS branch of Halide☆77Updated 6 years ago
- FPGA-based ZynqNet CNN accelerator developed by Vivado_HLS☆107Updated 7 years ago
- This is a collection of works on neural networks and neural accelerators.☆40Updated 5 years ago
- Binarized Convolutional Neural Networks on Software-Programmable FPGAs☆304Updated 4 years ago
- FPGA based acceleration of Convolutional Neural Networks. The project is developed by Verilog for Altera DE5 Net platform.☆177Updated 8 years ago