shaneleonard / neural-hardwareLinks
Verilog library for implementing neural networks.
☆26Updated 10 years ago
Alternatives and similar repositories for neural-hardware
Users that are interested in neural-hardware are comparing it to the libraries listed below
Sorting:
- Caffe to VHDL☆67Updated 4 years ago
- ☆65Updated 6 years ago
- SystemVerilog HDL and TB code Deep Neural Network Hardware Accelerator implementation on zybo 7010 FPGA and also C code for Vivado SDK So…☆110Updated 5 years ago
- ☆45Updated 5 years ago
- Verilog Convolutional Neural Network on PYNQ☆28Updated 7 years ago
- verilog CNN generator for FPGA☆34Updated 4 years ago
- Convolution Neural Network of vgg19 model in verilog☆46Updated 7 years ago
- This repo is for ECE44x (Fall2015-Spring2016)☆20Updated 7 years ago
- Generic FIFO implementation with optional FWFT☆57Updated 5 years ago
- ☆84Updated 4 years ago
- round robin arbiter☆74Updated 10 years ago
- ☆66Updated 3 years ago
- Digital Hardware Modelling using VHDL, Verilog, SystemVerilog, SystemC, HLS(C++, OpenCL)☆65Updated 3 months ago
- Pcie to AXI Bridge in Xilinx series-7 Kintex and Artix devices☆29Updated 9 years ago
- I present a novel pipelined fast Fourier transform (FFT) architecture which is capable of producing the output sequence in normal order. …☆42Updated last year
- RISC-V ISA based 32-bit processor written in HLS☆17Updated 5 years ago
- Generate testbench for your verilog module.☆38Updated 7 years ago
- The Verilog source code for DRUM approximate multiplier.☆31Updated 2 years ago
- Basic floating-point components for RISC-V processors☆65Updated 5 years ago
- Xilinx Deep Learning IP☆92Updated 4 years ago
- A project on hardware design for convolutional neural network. This neural network is of 2 layers with 400 inputs in the first layer. Thi…☆18Updated 7 years ago
- Tutorials on HLS Design☆51Updated 5 years ago
- Premade bitstreams and block designs to complemented the PYNQ overlay tutorial☆40Updated 3 years ago
- Contains FPGA benchmarks for Vivado HLS and Catapult HLS☆26Updated 4 years ago
- TensorCore Vector Processor for Deep Learning - Google Summer of Code Project☆22Updated 3 years ago
- Introductory examples for using PYNQ with Alveo☆51Updated 2 years ago
- TCL scripts for FPGA (Xilinx)☆32Updated 2 years ago
- A multi-board Extended Kalman Filter (EKF)☆32Updated 6 years ago
- HDL implementation of a pipelined multilayer perceptron (neural network)☆15Updated 9 years ago
- Source code of the paper "Low-Cost and Programmable CRC Implementation based on FPGA"☆42Updated 4 years ago