Eclipse Layout Kernel - Test models
☆20Aug 16, 2024Updated last year
Alternatives and similar repositories for elk-models
Users that are interested in elk-models are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Eclipse Layout Kernel - Automatic layout for Java applications.☆338Mar 9, 2026Updated 2 weeks ago
- Tic-tac-toe using react & xstate☆12Dec 25, 2021Updated 4 years ago
- Simple library for implementing state machines☆12Jul 23, 2021Updated 4 years ago
- Bring your own JavaScript tooling.☆22Apr 5, 2022Updated 3 years ago
- Extended and external tests for Verilator testing☆17Mar 11, 2026Updated last week
- Proof-of-concept npm worm☆10Apr 27, 2016Updated 9 years ago
- 💪🏽 Form creation made easy, backed by state machines☆30Nov 5, 2022Updated 3 years ago
- A composable, functional-reactive UI framework based on Cycle.js and React☆23Mar 4, 2023Updated 3 years ago
- JavaScript Hiccup compiler☆51May 27, 2022Updated 3 years ago
- Nearest Neighbor Search in High Dimensional Spaces☆13Nov 18, 2015Updated 10 years ago
- A python script that converts between schematic file formats☆21Dec 15, 2011Updated 14 years ago
- 1st Testwafer for LibreSilicon☆15May 24, 2019Updated 6 years ago
- RISC-V System on Chip Builder☆12Sep 27, 2020Updated 5 years ago
- Qt Plotting☆21Apr 7, 2025Updated 11 months ago
- The source code that empowers OpenROAD Cloud☆12Jun 29, 2020Updated 5 years ago
- A small demo illustrating how to render HTML as a WebGL1 texture☆20Dec 2, 2020Updated 5 years ago
- A cross platform, formally verified, open source, hyperRAM controller with simulator☆14Feb 22, 2019Updated 7 years ago
- Provides a packaged collection of open source EDA tools☆12Apr 14, 2019Updated 6 years ago
- ☆11Feb 16, 2019Updated 7 years ago
- Mirror of Synopsys's Liberty parser library☆24Jul 6, 2018Updated 7 years ago
- 64-bit MISC Architecture CPU☆13Dec 13, 2016Updated 9 years ago
- Compare 2 basketball players by reading/comparing NBA stats in an Excel sheet.☆11Aug 19, 2018Updated 7 years ago
- Business Rule Engine Hardware Accelerator☆14Jun 18, 2020Updated 5 years ago
- Yosys plugin for synthesis of Bluespec code☆15Sep 8, 2021Updated 4 years ago
- Loam system models☆16Dec 30, 2019Updated 6 years ago
- RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance☆12May 3, 2024Updated last year
- Hardware and script files related to dynamic partial reconfiguration☆11Mar 16, 2018Updated 8 years ago
- Paul Layzell's Evolvable Motherboard☆13Sep 14, 2015Updated 10 years ago
- Use A Fluent Builder To Generate Your X-State Configuration☆40Jan 4, 2023Updated 3 years ago
- An example OMI Device FPGA with 2 DDR4 memory ports☆20Jan 5, 2023Updated 3 years ago
- An example Hardware Processing Engine☆12Feb 4, 2023Updated 3 years ago
- Verilog Examples and WebFPGA Standard Library☆11Nov 25, 2019Updated 6 years ago
- Recipe for FPGA cooking☆11Mar 15, 2019Updated 7 years ago
- ☆11Apr 22, 2025Updated 11 months ago
- A small-but-powerful typesafe state machine, designed to handle large state graphs☆13Dec 6, 2022Updated 3 years ago
- template project for exploring Clojure☆38May 27, 2015Updated 10 years ago
- SwapForth J1a processor for Icestudio☆12Aug 28, 2020Updated 5 years ago
- A standalone parser for BSV (Bluespec SystemVerilog) written in Go☆14Dec 20, 2016Updated 9 years ago
- ☆11Feb 8, 2020Updated 6 years ago