Generate Zynq configurations without using the vendor GUI
☆30Jul 5, 2023Updated 2 years ago
Alternatives and similar repositories for fuse-zynq
Users that are interested in fuse-zynq are comparing it to the libraries listed below. We may earn a commission when you buy through links labeled 'Ad' on this page.
Sorting:
- Basic Pong you can extend with rotary, sound, vga generator and autopilot☆11Oct 26, 2021Updated 4 years ago
- ☆45Jan 5, 2023Updated 3 years ago
- Open source Logic Analyzer based on LiteX SoC☆27Apr 12, 2025Updated last year
- 32-bit RISC-V based processor with memory controler☆16Sep 2, 2022Updated 3 years ago
- Patched sources/configs for RISC-V Linux with musl-based toolchain targeting 8 MB RAM☆24Oct 13, 2022Updated 3 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Exploring gate level simulation☆58Mar 27, 2026Updated last month
- nextpnr portable FPGA place and route tool☆11Nov 30, 2020Updated 5 years ago
- ☆20Updated this week
- ☆15May 17, 2025Updated 11 months ago
- ☆38Dec 29, 2022Updated 3 years ago
- Fault Injection Automatic Test Equipment☆15Nov 22, 2021Updated 4 years ago
- Bit streams forthe Ulx3s ECP5 device☆18Apr 9, 2023Updated 3 years ago
- Adapter to use Colorlight i5/i9 FPGA boards in a QMTech board form factor☆20Jul 23, 2022Updated 3 years ago
- a small simple slow serial FPGA core☆16Mar 11, 2021Updated 5 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- Isle FPGA Computer☆85Updated this week
- OSCP Preparation Guide | Courses, Tricks, Tutorials, Exercises, Machines☆13Oct 17, 2023Updated 2 years ago
- CES VHDL utility library, with packages, memories, FIFOs, Clock Domain Crossing and more useful VHDL modules☆11Jan 17, 2022Updated 4 years ago
- Virtual development board for HDL design☆42Mar 31, 2023Updated 3 years ago
- A C module to decode raw GPS NMEA data☆10Sep 1, 2018Updated 7 years ago
- A Python package for generating HDL wrappers and top modules for HDL sources☆73Updated this week
- FPGA implementation of the AnotherWorld CPU (equivalent to the original VM)☆16Apr 6, 2020Updated 6 years ago
- ☆22Mar 5, 2022Updated 4 years ago
- Zucker SOC☆16Jun 11, 2025Updated 10 months ago
- Deploy on Railway without the complexity - Free Credits Offer • AdConnect your repo and Railway handles the rest with instant previews. Quickly provision container image services, databases, and storage volumes.
- USB virtual model in C++, co-simulating with Verilog, SystemVerilog and VHDL☆33Oct 15, 2024Updated last year
- FLIX-V: FPGA, Linux and RISC-V☆42Nov 5, 2023Updated 2 years ago
- ☆15May 29, 2020Updated 5 years ago
- ☆22Oct 19, 2021Updated 4 years ago
- Tool for updating the contents of BlockRAMs found in Xilinx 7 series bitstreams.☆19Feb 9, 2022Updated 4 years ago
- controller code to turn a stepper motor into a servo with 0-5V control input.☆22Jun 3, 2023Updated 2 years ago
- XVCD implementation for ANITA. Note that "ftdi_xvc_core.c" is a generic libftdi-based MPSSE XVC handler, and is awesome.☆19Jul 10, 2020Updated 5 years ago
- ☆43Apr 9, 2026Updated last month
- ☆25Sep 27, 2018Updated 7 years ago
- Deploy to Railway using AI coding agents - Free Credits Offer • AdUse Claude Code, Codex, OpenCode, and more. Autonomous software development now has the infrastructure to match with Railway.
- SD device emulator from ProjectVault☆20Sep 24, 2019Updated 6 years ago
- ☆97Oct 13, 2025Updated 6 months ago
- 基于高云FPGA与AD9363/AD9361射频收发器，构建了一套灵活可重构的软件无线电（SDR）系统，通信核心代码纯Verilog实现。软硬件全开源，高速基带处理部署于FPGA，交互业务部署于Python上位机，通过千兆以太网交互，实现了QPSK等多种实时通信与动态参数配…☆79Apr 1, 2026Updated last month
- An MPEG2 video decoder, written in Verilog and implemented in an FPGA chip.☆27Apr 24, 2019Updated 7 years ago
- Iron: selectively turn RISC-V binaries into hardware☆23Jun 8, 2023Updated 2 years ago
- WordPress plugin that provides a Gutenberg block for embedding the SemiAnalysis die yield calculator in posts and pages☆20Apr 21, 2026Updated 2 weeks ago
- Simple Path Tracer on an FPGA☆34Aug 29, 2021Updated 4 years ago